Dual Memory Access Non-Volatile Storage via PCIe Bus

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Solution Overview

Problem

Conventional flash-based SSDs face limitations in accessing storage due to their block size configuration, which affects access speed and efficiency, particularly when using traditional HDD I/O access interfaces, leading to suboptimal performance in handling large data applications.

Innovation Solution

A digital processing system that enables dual memory access to non-volatile memory devices using extended memory addresses via a PCIe bus, allowing direct memory access and I/O access, thereby improving access latency and efficiency by utilizing a buffering mechanism and pre-fetch operations.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If conventional flash-based SSD uses traditional HDD I/O access interface with block size configuration, then compatibility with traditional storage systems is improved, but access speed and efficiency deteriorate

Engineering Contradiction:

ImprovecompatibilityVSAvoidaccess speed

Core Design Contradiction:

Adaptability or versatilityVSSpeed

Solution Approach 1:

The SSD controller is designed to support multiple access modes (memory-mapped access and I/O access) and multiple block sizes (4KB and 512B), enabling the device to function as both a traditional storage device and a high-speed memory device, thus resolving the contradiction between compatibility and access speed

Inventive Principle:

Principle #6Universality (Multi-functionality)

2Adaptability or versatility

If flash-based SSD uses 4KB block size for I/O access, then compatibility with HDD interface is improved, but access efficiency for large data applications deteriorates

Engineering Contradiction:

Improveinterface compatibilityVSAvoidaccess efficiency

Core Design Contradiction:

Adaptability or versatilityVSProductivity

Solution Approach 1:

The system dynamically adjusts block size based on access mode: using 4KB blocks for I/O access to maintain HDD compatibility, and switching to 512B blocks for memory-mapped access to optimize performance for large data applications, thereby resolving the contradiction between interface compatibility and access efficiency

Inventive Principle:

Principle #15Dynamics

3Speed

If dual memory access mode is implemented, then access efficiency and speed are improved, but device complexity increases

Engineering Contradiction:

Improveaccess speedVSAvoidaccess mode complexity

Core Design Contradiction:

SpeedVSDevice complexity

Solution Approach 1:

The PCIe bus serves as an intermediary that enables dual access modes (memory-mapped and I/O access) to the SSD, allowing the CPU to access storage space in either mode without requiring separate physical interfaces or controllers, thus improving access speed while managing device complexity

Inventive Principle:

Principle #24Intermediary (Mediator)

Data Source

PatentUS9785545B2Method and apparatus for providing dual memory access to non-volatile memory

Publication Date: 2017.10.10 POINT FINANCIAL

AI summary

A method and system for providing a dual memory access to a non-volatile memory device using expended memory addresses are disclosed. The digital processing system such as a computer includes a non-volatile memory device, a peripheral bus, and a digital processing unit. The non-volatile memory device such as a solid state drive can store data persistently. The peripheral bus, which can be a peripheral component interconnect express (“PCIe”) bus, is used to support memory access to the non-volatile memory device. The digital processing unit such as a central processing unit (“CPU”) is capable of accessing storage space in the non-volatile memory device in accordance with an extended memory address and offset.