Dual-Memory Pixel Matrix for Low-Power Graphic Overlay
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Existing matrix display technologies face challenges in achieving low power consumption for static displays while maintaining high-quality dynamic display capabilities, particularly in efficiently overlaying graphic images onto video images, due to limitations in pixel size and memory addressing.
Innovation Solution
A matrix display device with an array of elementary electroluminescent emitting areas utilizing two addressing modes: a video mode for dynamic display with standard interface and refresh rates, and a graphics mode using SRAM-type static memory for overlaying graphic images, with independent dynamic and static memories per pixel.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Use of energy by moving object
If an SRAM matrix circuit is used for static display to achieve low power consumption, then power consumption is reduced, but the pixel size becomes excessively large for high-quality video display
Solution Approach 1:
The patent divides each pixel into multiple subpixels, with each subpixel having its own independent SRAM cell. This segmentation allows the display to use low-power static memory for graphic display while maintaining the ability to achieve high-resolution video display through selective activation of subpixels, thereby resolving the contradiction between low power consumption and small pixel size.
2Measurement precision
If periodic refresh is implemented for dynamic display to maintain image quality, then video quality is improved, but power consumption increases significantly
Solution Approach 1:
The patent implements a dual-mode addressing system that dynamically switches between static display mode (using SRAM for low power consumption) and dynamic display mode (using video interface with periodic refresh for high video quality). This dynamic adaptability allows the display to optimize power consumption based on the actual display content requirements, resolving the contradiction between video quality and power consumption.
3Measurement precision
If high-bit encoding (8-10 bits) is used per subpixel for video quality, then video image quality is improved, but the pixel size becomes excessively large
Solution Approach 1:
The patent adds a temporal dimension to the display system by implementing dual addressing modes that operate at different refresh rates. The static mode uses low-bit encoding with minimal refresh, while the dynamic mode uses high-bit encoding with higher refresh rates. This temporal differentiation allows the system to achieve high video quality when needed without permanently increasing pixel size, as the high-bit encoding is only activated during dynamic display operations.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution enables low power consumption for static displays and high-quality dynamic display, allowing efficient overlaying of graphic images onto video images without excessive pixel size, using a dual-memory system for each pixel.
Implementation Method 1
an array of elementary electroluminescent emitting areas
Data Source
Figure 1~2a
Figure 2b~3
Figure 4
AI summary
The invention relates to an electroluminescent visual display unit (1) comprising: a matrix of electroluminescent pixels (38) formed from a plurality of pixels arranged on a substrate, in a matrix arrangement in lines and columns, each pixel being formed by at least one elementary emitting zone (225, 325, 425); a first control block (2) designed to control a graphic and/or alphanumeric data stream that can be displayed on said matrix of pixels (38); a second control block (3) designed to control a video data stream that can be displayed on said matrix of pixels (38); and a unit (4) for generating a reference voltage, said device being characterised in that: each elementary emitting zone is connected to a static memory, addressed by said first control block (2), and to a dynamic memory, addressed by said second control block (3); said first (2) and second (3) control blocks being designed to be able to display data alternately or simultaneously on the same matrix of pixels (38).