Dual Memory Module Segmentation for Video Decoder Bandwidth

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Solution Overview

Problem

Conventional video communication systems face inefficiencies in memory access bandwidth, particularly in motion compensation processing, where large memory access is required for sub-pixel displacements, leading to wasteful utilization of bandwidth and resources.

Innovation Solution

A dual-memory module system is implemented, where a first memory module with wider access handles non-reference video information and a second memory module with narrower access efficiently stores and retrieves reference video information, optimizing memory access by segregating data types and access widths.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If larger memory modules and multiple memory accesses per read cycle are used to increase memory access bandwidth, then video decoder performance is improved, but the cost increases significantly

Engineering Contradiction:
Improvevideo decoder performanceVSAvoidmemory module size and type
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The patent divides the memory system into two separate memory modules: a first memory module for storing current frame data and a second memory module for storing reference frame data. This segmentation allows each memory module to be optimized independently, with the second memory module having narrower access width suited for reference frame retrieval patterns, thereby reducing overall system cost while maintaining decode performance

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent applies different memory access widths to different memory modules based on their specific usage requirements. The first memory module uses wider access for current frame data, while the second memory module uses narrower access for reference frame data. This local optimization matches memory resources to actual access patterns, reducing unnecessary bandwidth consumption and cost

Inventive Principle:
Principle #3Local quality

2Speed

If wider memory access is used for motion compensation processing, then data access speed is improved, but bandwidth is wasted when only smaller portions of data are needed

Engineering Contradiction:
Improvedata access speedVSAvoidmemory bandwidth utilization efficiency
Core Design Contradiction:
SpeedVSLoss of energy

Solution Approach 1:

The patent optimizes memory access width locally for reference frame data by using a second memory module with narrower access width that matches the actual data retrieval requirements. This prevents wasting wide memory bus bandwidth when only small portions of reference frame data are needed, improving bandwidth utilization efficiency while maintaining adequate access speed

Inventive Principle:
Principle #3Local quality

3Device complexity

If a single memory module is used for both current and reference video information, then device complexity is reduced, but memory access bandwidth efficiency decreases

Engineering Contradiction:
Improvememory module configurationVSAvoidmemory access bandwidth efficiency
Core Design Contradiction:
Device complexityVSProductivity

Solution Approach 1:

The patent segments memory storage into two distinct memory modules: one for current frame data and another for reference frame data. This segmentation enables independent optimization of each memory module's access width according to its specific access patterns, improving overall memory access bandwidth efficiency despite the increased device complexity

Inventive Principle:
Principle #1Segmentation

Data Source

PatentUS8514944B2Reducing motion compensation memory bandwidth through memory utilization
Publication Date: 2013.08.20 AVAGO TECHNOLOGIES INTERNATIONAL SALES PTE LTD
  • US8514944B2 patent drawing
  • US8514944B2 patent drawing
  • US8514944B2 patent drawing

AI summary

A system and method for processing video information. Various aspects of the present invention may provide a decoder module that decodes block encoded video information. The system may, for example, include a first memory module, communicatively coupled to the decoder module, that stores video processing information utilized by the decoder module for decoding a current video block from a current video frame. The system may also, for example, include a second memory module, communicatively coupled to the decoder module, that stores reference video information from a previous video frame utilized by the decoder module for decoding the current video block. In a non-limiting exemplary scenario, the first memory module and the second memory module may be communicatively coupled to the decoder module with independent respective data and/or address buses.