Dual-Mode Signal Amplifier for Stable Wideband Interference Rejection

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Solution Overview

Problem

Conventional signal receivers experience performance degradation due to out-of-band interference, which is exacerbated by the instability caused by reducing capacitance to increase unity gain bandwidth in signal amplifying circuits.

Innovation Solution

A dual-mode signal amplifying circuit with minimized compensation capacitors and additional current sources and switches, along with capacitors and resistors in the feedback path, to enhance stability and immunity to out-of-band interference while maintaining or increasing unity gain bandwidth.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Speed

If the capacitance of compensation capacitors is reduced to increase unity gain bandwidth, then the unity gain bandwidth is improved, but the stability of the signal amplifying circuit is degraded

Engineering Contradiction:
Improveunity gain bandwidthVSAvoidstability of signal amplifying circuit
Core Design Contradiction:
SpeedVSStability of the object's composition

Solution Approach 1:

The patent implements dynamic switching between differential mode and common mode operations using control signals. The circuit transitions from a static configuration to a dynamic one where the operational mode can change based on input conditions, allowing the circuit to optimize performance for different signal types while maintaining stability through active mode control

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The patent divides the signal amplifying circuit into separate differential mode processing paths and common mode processing paths. By segmenting the circuit functionality and using independent current sources and switches for each mode, the design allows each segment to be optimized independently, resolving the stability-bandwidth tradeoff through modular architecture

Inventive Principle:
Principle #1Segmentation

2Object-affected harmful factors

If the unity gain bandwidth is increased to improve immunity to out-of-band interference, then the immunity to out-of-band interference is improved, but the stability is degraded

Engineering Contradiction:
Improveimmunity to out-of-band interferenceVSAvoidstability of signal amplifying circuit
Core Design Contradiction:
Object-affected harmful factorsVSStability of the object's composition

Solution Approach 1:

The circuit dynamically adapts its operational mode based on the characteristics of the input signal. By using control signals to switch between differential and common mode operations, the circuit can optimize its frequency response and immunity characteristics in real-time while maintaining stability through active mode management

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The patent changes the operational parameters of the circuit by switching between different modes (differential and common mode). This parameter change allows the circuit to adjust its bandwidth and immunity characteristics dynamically, achieving high immunity to out-of-band interference without sacrificing stability through fixed-parameter design

Inventive Principle:
Principle #35Parameter changes

Data Source

PatentUS11223328B2Dual-mode signal amplifying circuit of signal receiver
Publication Date: 2022.01.11 REALTEK SEMICON CORP
  • US11223328B2 patent drawing
  • US11223328B2 patent drawing

AI summary

A dual-mode signal amplifying circuit includes: a first and a second input terminals for receiving differential input signals; two output terminals for providing differential output signals; a first through a third current sources; a first switch positioned between the first current source and a first node, and controlled by the first input terminal; a second switch positioned between the first current source and a second node, and controlled by the second input terminal; a third switch positioned between the first node and a fixed-voltage terminal, and controlled by a third node; a fourth switch positioned between the second node and a fixed-voltage terminal and controlled by the third node; a fifth switch positioned between the second current source and a fixed-voltage terminal, and controlled by the first node; and a sixth switch positioned between the third current source and a fixed-voltage terminal, and controlled by the second node.