Dual-Mode Signal Amplifier Switching for Bandwidth and Stability

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Solution Overview

Problem

Conventional signal receivers face performance degradation due to out-of-band interference, which is exacerbated by the instability caused by reducing capacitance to increase unity gain bandwidth in signal amplifying circuits.

Innovation Solution

A dual-mode signal amplifying circuit with minimized compensation capacitors and additional current sources and switches that enhance transconductance and capacitance in feedback paths, allowing for increased unity gain bandwidth while maintaining stability during differential and common mode operations.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Speed

If the capacitance of compensation capacitors is reduced to increase unity gain bandwidth, then the immunity to out-of-band interference is improved, but the stability of the signal amplifying circuit is degraded

Engineering Contradiction:
Improveunity gain bandwidthVSAvoidstability of signal amplifying circuit
Core Design Contradiction:
SpeedVSStability of the object's composition

Solution Approach 1:

The patent implements dynamic switching between two operational modes (first mode and second mode) using control signals. In the first mode, the circuit operates with higher unity gain bandwidth for improved out-of-band interference immunity. In the second mode, the circuit operates with enhanced stability. This dynamic adaptation allows the system to optimize performance based on operating conditions, resolving the contradiction between bandwidth and stability.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The patent changes the operational parameters of the signal amplifying circuit by switching between different configurations. The first mode utilizes a first set of parameter values optimized for bandwidth, while the second mode uses a second set of parameter values optimized for stability. This parameter switching enables the circuit to achieve both high unity gain bandwidth and stable operation under different conditions.

Inventive Principle:
Principle #35Parameter changes

2Reliability

If the unity gain bandwidth is increased to improve immunity to out-of-band interference, then the operating performance is improved, but the stability is degraded

Engineering Contradiction:
Improveimmunity to out-of-band interferenceVSAvoidstability of signal amplifying circuit
Core Design Contradiction:
ReliabilityVSStability of the object's composition

Solution Approach 1:

The patent employs dynamic mode switching to adapt the circuit's characteristics based on operational requirements. When out-of-band interference immunity is prioritized, the circuit operates in the first mode with higher unity gain bandwidth. When stability is prioritized, the circuit switches to the second mode, thereby dynamically balancing reliability and stability.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The signal amplifying circuit is designed to perform multiple functions through two distinct operational modes. The first mode provides enhanced immunity to out-of-band interference, while the second mode provides enhanced stability. This multi-functionality allows the single circuit to address both reliability and stability requirements depending on the operating context.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Data Source

PatentUS10763793B2Dual-mode signal amplifying circuit of signal receiver
Publication Date: 2020.09.01 REALTEK SEMICON CORP
  • US10763793B2 patent drawing
  • US10763793B2 patent drawing

AI summary

A dual-mode signal amplifying circuit includes: a first and a second input terminals for receiving differential input signals; two output terminals for providing differential output signals; a first through a third current sources; a first switch positioned between the first current source and a first node, and controlled by the first input terminal; a second switch positioned between the first current source and a second node, and controlled by the second input terminal; a third switch positioned between the first node and a fixed-voltage terminal, and controlled by a third node; a fourth switch positioned between the second node and a fixed-voltage terminal, and controlled by the third node; a fifth switch positioned between the second current source and a fixed-voltage terminal, and controlled by the first node; and a sixth switch positioned between the third current source and a fixed-voltage terminal, and controlled by the second node.