Dual-Mode Doherty Power Amplifier Without Post-Matching Networks
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Doherty power amplifiers face limitations in bandwidth due to drain-source capacitance and impedance transformer constraints, leading to area occupation and loss issues, especially at high frequencies or in on-chip designs, which are not adequately addressed by existing broadbanding techniques.
Innovation Solution
A Doherty power amplifier design utilizing dual-mode impedance transformers that convert load-pull impedance at two frequencies simultaneously, eliminating the need for post-matching networks and incorporating a short-ended stub structure for compactness and efficiency, allowing for a broadband and compact design without the use of post-matching networks.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If post-matching networks are used to broaden bandwidth, then bandwidth is improved, but area occupation and loss increase
Solution Approach 1:
The patent removes the post-matching network from the DPA architecture, extracting the bandwidth-limiting component while maintaining broadband performance through alternative impedance transformation methods at the output node
Solution Approach 2:
The patent combines the impedance transformation function directly into the output matching network at the summing node, merging multiple functions into a single integrated structure that eliminates the need for separate post-matching networks
2Adaptability or versatility
If post-matching networks are used to broaden bandwidth, then bandwidth is improved, but loss increases
Solution Approach 1:
The patent extracts and removes the post-matching network that causes excessive loss, achieving broadband performance through reconfigured output matching that reduces energy dissipation
Solution Approach 2:
The patent changes the impedance transformation parameters and network configuration to optimize the balance between bandwidth and loss, using modified matching network topologies that reduce resistive losses while maintaining broadband operation
3Device complexity
If conventional DPA structures are used, then simplicity is maintained, but bandwidth is limited
Solution Approach 1:
The patent introduces dynamic impedance transformation capabilities through reconfigurable matching networks that adapt to different frequency conditions, enabling broadband operation while maintaining relatively simple DPA architecture
Solution Approach 2:
The patent modifies key parameters including impedance transformation ratios, matching network topologies, and component values to extend bandwidth while preserving the fundamental simplicity of the Doherty amplifier structure
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution results in a compact, broadband Doherty power amplifier with reduced size, loss, and cost, achieving comparable performance to traditional designs while being suitable for small-cell base stations and on-chip integration, with improved efficiency and harmonic injection capabilities.
Implementation Method 1
The first and second dual-mode ITs are adapted to convert a load-pull impedance of a corresponding one of the main and auxiliary power amplification devices to a load impedance at the output, at two frequencies simultaneously
Implementation Method 2
incorporating a short-ended stub structure for compactness and efficiency
Data Source
AI summary
A Doherty power amplifier that includes an input, an output, a main power amplification device connected between the input and the output; and an auxiliary power amplification device connected between the input and the output. The auxiliary power amplification device is arranged in parallel with the main power amplification device. The Doherty power amplifier further includes a first dual-mode impedance transformer connected between the main power amplification device and the output, and a second dual-mode impedance transformer between the auxiliary power amplification device and the output. The first and second dual-mode ITs each is adapted to convert an input impedance of a corresponding one of the main and auxiliary power amplification devices to a load impedance at the output, at two frequencies simultaneously.


