Dual-Mode ECC Architecture for Data Storage Error Correction

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Solution Overview

Problem

Data storage systems face issues with read disturbance and data retention causing failed bits due to changes in cell threshold voltages, leading to inefficiencies in error correction and increased hardware and power consumption.

Innovation Solution

Implementing a data storage system with built-in weaker ECC decoders for routine operations and external stronger ECC decoders for reliability, reducing hardware costs and power consumption while maintaining system reliability through dual-mode ECC architectures.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If stronger ECC decoders are implemented in data storage devices, then error correction capability is improved, but hardware cost and power consumption increase

Engineering Contradiction:

Improveerror correction capabilityVSAvoidpower consumption

Core Design Contradiction:

ReliabilityVSUse of energy by moving object

Solution Approach 1:

The system divides error correction functionality into two segments: built-in ECC decoders within data storage devices for routine error correction, and external stronger ECC decoders for handling difficult cases. This segmentation allows each component to be optimized independently, reducing overall power consumption while maintaining high error correction capability.

Inventive Principle:

Principle #1Segmentation

Solution Approach 2:

The patent extracts the complex, power-intensive ECC decoding functionality from the data storage devices and places it in external devices. Only essential, low-power ECC functionality remains built-in, while the external devices handle the heavy lifting for difficult error correction cases.

Inventive Principle:

Principle #2Taking out (Extraction)

2Reliability

If stronger ECC decoders are implemented in data storage devices, then error correction capability is improved, but hardware cost increases

Engineering Contradiction:

Improveerror correction capabilityVSAvoidhardware cost

Core Design Contradiction:

ReliabilityVSEase of manufacture

Solution Approach 1:

The system segments ECC functionality across different levels: basic ECC in built-in decoders and advanced ECC in external decoders. This allows manufacturers to produce data storage devices with lower-cost components while still providing access to high-capability error correction through external devices when needed.

Inventive Principle:

Principle #1Segmentation

Solution Approach 2:

Complex and expensive ECC decoding capabilities are extracted from the data storage devices and placed in external devices. This reduces the hardware cost of individual storage devices while maintaining the option for high-capability error correction through the external system.

Inventive Principle:

Principle #2Taking out (Extraction)

3Device complexity

If built-in ECC decoders handle all error corrections, then system complexity is reduced, but power consumption and cost increase

Engineering Contradiction:

Improvesystem complexityVSAvoidpower consumption

Core Design Contradiction:

Device complexityVSUse of energy by moving object

Solution Approach 1:

The system segments the error correction workload between built-in and external decoders. The built-in decoders handle simple, frequent error correction tasks with low power consumption, while external decoders handle complex, rare cases. This segmentation reduces overall power consumption while maintaining manageable system complexity.

Inventive Principle:

Principle #1Segmentation

4Adaptability or versatility

If dual-mode ECC architecture is implemented, then error correction flexibility is improved, but device complexity increases

Engineering Contradiction:

Improveerror correction flexibilityVSAvoidsystem complexity

Core Design Contradiction:

Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The system introduces an intermediary control mechanism that manages the interaction between built-in and external ECC decoders. This intermediary layer handles the complexity of coordinating dual-mode operation, allowing the system to achieve high flexibility while keeping individual components relatively simple.

Inventive Principle:

Principle #24Intermediary (Mediator)

Data Source

PatentUS12572412B2Managing error corrections for data storage systems

Publication Date: 2026.03.10 MACRONIX INTERNATIONAL CO LTD

AI summary

Systems, methods, and devices for managing error corrections for data storage systems are provided. In one aspect, a data storage system includes one or more data storage devices. A data storage device has at least one memory and a memory controller including at least one first Error-Correcting Code (ECC) decoder. The memory controller is configured to: read data from the at least one memory, perform an ECC test on the read data using the at least one first ECC decoder, and in response to determining that the read data fails to pass the ECC test, transmit the read data to an external device having at least one second ECC decoder for decoding the read data. The external device is external to the data storage device. The at least one second ECC decoder has a stronger ECC capability than the at least one first ECC decoder.