Dual-Mode ECC/WOM Codec for Non-Volatile Memory Endurance
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Solution Overview
Problem
Existing memory device solutions, such as electrically erasable read-only memories, are unsuited for certain applications due to increased cost and decreased performance characteristics, particularly in systems requiring non-volatile memory with efficient write and read capabilities.
Innovation Solution
A dual-mode error correction code (ECC) and write-once memory (WOM) coding and decoding system that includes a controller for selecting between ECC and WOM modes, utilizing a codec that operates in both modes to identify bit errors and encode/decode data efficiently, allowing for multiple writes without erasure.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Stability of the object's composition
If electrically erasable read-only memory is used, then non-volatile memory capability is provided, but cost increases and performance characteristics decrease
Solution Approach 1:
The patent implements a dual-mode codec that can operate in both ECC mode and WOM mode, allowing the same hardware structure to serve multiple memory functions. The syndrome table is reused for both error correction and write-once memory encoding, eliminating the need for separate dedicated structures for each function, thereby reducing overall system complexity and cost while maintaining non-volatile memory capability
Solution Approach 2:
The patent combines ECC and WOM functionality into a single integrated codec structure. The syndrome table, which traditionally would be dedicated to ECC operations, is merged with WOM encoding capabilities. This consolidation allows the system to achieve non-volatile memory functionality without requiring separate independent systems, thus reducing device complexity and cost
2Reliability
If ECC mode is used, then data integrity is improved, but write/erase endurance decreases
Solution Approach 1:
The patent implements a dynamic mode selection mechanism that allows the system to switch between ECC mode and WOM mode based on operational requirements. When write/erase operations are needed, the system transitions to WOM mode which preserves endurance, while maintaining the capability to switch to ECC mode when data integrity is the priority. This dynamic adaptability resolves the contradiction by allowing the system to optimize for different parameters at different times
3Duration of action of stationary object
If WOM mode is used, then write/erase endurance is improved, but error correction capability is reduced
Solution Approach 1:
The system employs dynamic mode selection that enables transition between WOM mode and ECC mode. When operating in WOM mode to maximize write/erase endurance, the system maintains the option to switch to ECC mode for critical operations requiring enhanced error correction. This dynamic capability ensures that error correction needs are met without permanently sacrificing write/erase endurance
4Adaptability or versatility
If separate ECC and WOM structures are used, then functionality is improved, but design complexity increases
Solution Approach 1:
The patent designs a universal codec structure that performs both ECC and WOM functions. The syndrome table is configured to serve dual purposes: traditional ECC error correction and WOM encoding/decoding operations. This multi-functional design eliminates the need for separate dedicated structures, thereby reducing design complexity while maintaining full functionality for both ECC and WOM operations
Solution Approach 2:
The patent merges the ECC syndrome table with WOM encoding capabilities into a single integrated structure. By combining these previously separate functions into one unified codec, the design achieves both ECC and WOM functionality without the overhead of maintaining separate independent structures, thus reducing overall design complexity
Data Source
AI summary
A system for error correction code (ECC) management of write-once memory (WOM) codes includes, for example, a controller for selecting between one of a WOM (Write-Once Memory) mode and an ECC (error correction code) mode. A codec is arranged to operate in the selected mode. The codec while operating in the ECC mode is arranged to identify a bit position of at least one bit error in response to ECC parity bits of a first received data word. The codec while operating in the WOM mode is arranged to receive a WOM-encoded word from an addressed location in a WOM device, to receive a second received data word to be encoded and written to the addressed location, and to generate WOM-encoded word for writing to the addressed location in the WOM device. The WOM-encoded word for writing to the addressed location is optionally ECC encoded.