Dual-Mode MOSFET Power Amplifier With Shared Output Stack
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Solution Overview
Problem
Modern wireless communication systems face inefficiencies and complexity due to the need for separate power amplifiers for different modulation schemes, leading to increased chip real estate, power consumption, and operational complexity.
Innovation Solution
A dual-mode power amplifier configuration that includes a first power amplifier for linear mode operation and a second power amplifier for switching mode operation, both sharing a common output node and adapted on a single semiconductor die, with a shared MOSFET stack and bias circuit to optimize performance for variable and constant envelope signals.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If separate power amplifiers are used for different modulation schemes, then performance requirements for each modulation scheme are met, but chip real estate, power consumption, and operational complexity increase
Solution Approach 1:
The patent implements a single power amplifier capable of operating in both linear mode and switching mode to support different modulation schemes. The amplifier includes mode selection circuitry that configures the same hardware for linear operation with variable envelope signals (e.g., OFDM) or switching operation with constant envelope signals (e.g., FSK), eliminating the need for separate amplifiers and reducing operational complexity while maintaining performance requirements for each modulation type
Solution Approach 2:
The patent combines multiple power amplifier functions into a single device by integrating both linear and switching mode capabilities in one amplifier circuit. The output stages and control mechanisms are merged into a unified structure that can dynamically switch between operating modes, reducing the total number of components and simplifying the overall system architecture
2Reliability
If separate power amplifiers are used for different modulation schemes, then performance requirements for each modulation scheme are met, but chip real estate increases
Solution Approach 1:
The patent implements a single power amplifier capable of operating in both linear mode and switching mode to support different modulation schemes. The amplifier includes mode selection circuitry that configures the same hardware for linear operation with variable envelope signals (e.g., OFDM) or switching operation with constant envelope signals (e.g., FSK), eliminating the need for separate amplifiers and reducing operational complexity while maintaining performance requirements for each modulation type
Solution Approach 2:
The patent combines multiple power amplifier functions into a single device by integrating both linear and switching mode capabilities in one amplifier circuit. The output stages and control mechanisms are merged into a unified structure that can dynamically switch between operating modes, reducing the total number of components and simplifying the overall system architecture
3Reliability
If separate power amplifiers are used for different modulation schemes, then performance requirements for each modulation scheme are met, but power consumption increases
Solution Approach 1:
The patent employs dynamic mode switching that adapts the power amplifier's operating mode based on the modulation scheme being used. The system dynamically configures the amplifier between linear and switching modes through control circuitry that responds to signal characteristics, enabling optimal power consumption for each modulation type while maintaining performance requirements
Data Source
AI summary
In one embodiment, a dual-mode power amplifier that can operate in different modes includes: a first pair of metal oxide semiconductor field effect transistors (MOSFETs) to receive and pass a constant envelope signal; a second pair of MOSFETs to receive and pass a variable envelope signal, where first terminals of the first pair of MOSFETs are coupled to first terminals of the second pair of MOSFETs, and second terminals of the first pair of MOSFETs are coupled to. second terminals of the second pair of MOSFETs; and a shared MOSFET stack coupled to the first pair of MOSFETs and the second pair of MOSFETs.