Dual-Mode Free-Running Oscillator With Shared Trimming
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Solution Overview
Problem
Existing clock signal generation methods are inefficient, particularly in low-power modes, as they require additional trimming and biasing circuits that increase cost, complexity, and chip space usage.
Innovation Solution
A dual-mode oscillator system with a reference current generator, converter, and scalable current mirrors to generate clock signals at different frequencies, using a selector to adjust mirroring ratios and a trimming circuit to control output currents, allowing for efficient frequency switching without additional hardware.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Use of energy by moving object
If the system clock is switched to a low-frequency mode during low-power mode or sleep mode, then power consumption is reduced, but additional trimming or biasing circuits are required which increase cost and complexity
Solution Approach 1:
The patent implements a dual-mode oscillator core that can operate in both high-frequency and low-frequency modes using the same hardware circuitry. The oscillator core is designed with scalable current mirrors and transistor sizing that allow it to function across different frequency ranges without requiring separate trimming circuits for each mode, thus achieving multi-functionality with a single device
Solution Approach 2:
The patent merges the high-frequency and low-frequency oscillator functions into a single unified oscillator core. By combining the frequency multiplication circuitry and current mirror structures, the design eliminates the need for separate trimming and biasing circuits that would otherwise be required for independent high-frequency and low-frequency oscillators
2Measurement precision
If additional trimming and biasing circuits are implemented for low-frequency mode, then accuracy is improved, but chip space and memory bits are substantially increased
Solution Approach 1:
The patent achieves accurate low-frequency operation by changing the bias current parameter through scalable current mirrors with different mirroring ratios. By adjusting the current scaling factors in the current mirror circuitry, the oscillator can maintain high accuracy across both high-frequency and low-frequency modes without requiring additional trimming circuits or memory bits
3Measurement precision
If trimming and biasing circuits are added for higher accuracy in low frequency mode, then manufacturing cost is increased, but accuracy is improved
Solution Approach 1:
The patent uses current mirror copying mechanisms to replicate and scale reference currents to generate the appropriate bias currents for different operating frequencies. This copying approach allows accurate low-frequency operation to be achieved through simple current scaling rather than complex additional trimming circuits, thereby reducing manufacturing cost while maintaining accuracy
Data Source
AI summary
A free running oscillator (FRO) includes a reference current generator, a current converter, and first and second oscillator cores. The reference current generator generates a first current. The current converter generates a second current based on the first current. The first oscillator core generates a clock signal at a first frequency based on a first value of the second current. The second oscillator core generates a clock signal at a second frequency based on a second value of the second current. The second frequency may be lower than the first frequency, and the second value of the second current lower than the first value of the second current.