Dual-Mode MOSFET Power Amplifier With Shared Stack for Multi-Modulation
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Solution Overview
Problem
Modern wireless communication systems face inefficiencies and complexity due to the need for separate power amplifiers for different modulation schemes, such as constant and variable envelope signals, leading to increased chip real estate, power consumption, and operational complexity.
Innovation Solution
A dual-mode power amplifier configuration that includes a first power amplifier for linear mode operation and a second power amplifier for switching mode operation, both AC-coupled to a shared output node, with a shared MOSFET stack and bias circuit to optimize impedance matching and reduce die area, allowing for efficient operation in both modes.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If separate power amplifiers are used for different modulation schemes, then performance requirements for each modulation scheme are met, but chip real estate, power consumption, and operational complexity increase
Solution Approach 1:
The patent implements a universal power amplifier that can operate in multiple modes (linear and switching) to support different modulation schemes. The single PA circuit is configured to handle both constant envelope modulation (CEM) and variable envelope modulation (VEM) by switching between operating modes, eliminating the need for separate amplifiers for each modulation type while maintaining performance requirements for both.
Solution Approach 2:
The patent merges the functionality of separate linear mode PA and switching mode PA into a single dual-mode power amplifier. By combining these amplifiers with a shared output node and integrating them on a single semiconductor die, the design reduces chip real estate and operational complexity while meeting performance requirements for both CEM and VEM schemes.
2Reliability
If separate power amplifiers are used for different modulation schemes, then performance requirements for each modulation scheme are met, but chip real estate increases
Solution Approach 1:
The patent merges the functionality of separate linear mode PA and switching mode PA into a single dual-mode power amplifier. By combining these amplifiers with a shared output node and integrating them on a single semiconductor die, the design reduces chip real estate and operational complexity while meeting performance requirements for both CEM and VEM schemes.
Solution Approach 2:
The patent implements a universal power amplifier that can operate in multiple modes (linear and switching) to support different modulation schemes. The single PA circuit is configured to handle both constant envelope modulation (CEM) and variable envelope modulation (VEM) by switching between operating modes, eliminating the need for separate amplifiers for each modulation type while maintaining performance requirements for both.
3Reliability
If separate power amplifiers are used for different modulation schemes, then performance requirements for each modulation scheme are met, but power consumption increases
Solution Approach 1:
The patent employs dynamic mode switching within the power amplifier to adapt to different modulation schemes. The PA can switch between linear mode and switching mode operation based on the modulation type (VEM or CEM), optimizing power consumption for each mode while maintaining performance requirements. This dynamic adaptation reduces overall power consumption compared to using separate amplifiers.
Data Source
AI summary
In one embodiment, a dual-mode power amplifier that can operate in different modes includes: a first pair of metal oxide semiconductor field effect transistors (MOSFETs) to receive and pass a constant envelope signal; a second pair of MOSFETs to receive and pass a variable envelope signal, where first terminals of the first pair of MOSFETs are coupled to first terminals of the second pair of MOSFETs, and second terminals of the first pair of MOSFETs are coupled to. second terminals of the second pair of MOSFETs; and a shared MOSFET stack coupled to the first pair of MOSFETs and the second pair of MOSFETs.