Dual-Mode RFID Strap and Antenna Layout for Lower-Cost Manufacturing
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Solution Overview
Problem
Current dual-mode RFID devices are expensive due to the use of etching techniques for manufacturing, particularly for HF and UHF antennas, which limits cost-effective production and efficiency.
Innovation Solution
A dual-mode RFID device with an integrated strap containing a conductive ring and HF antenna, coupled to a RFID chip assembly, that can couple magnetically, conductively, or capacitively with a UHF antenna without physical contact, using a common substrate and forming UHF antennas through cost-effective methods like die-cutting or laser-cutting, and employing a dual-mode RFID chip that can operate in both HF and UHF frequencies.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If etching techniques are used to manufacture HF and UHF antennas, then manufacturing precision and reliability are improved, but manufacturing cost increases
Solution Approach 1:
The patent divides the antenna system into two separate frequency systems (HF and UHF), each with its own antenna and chip pair. This segmentation allows each subsystem to be optimized and manufactured independently using appropriate techniques, reducing overall complexity and cost while maintaining precision for each frequency band.
Solution Approach 2:
The patent employs a dual-mode RFID chip that can operate in both HF and UHF frequency bands. This multi-functional chip reduces the need for separate specialized components, simplifying the manufacturing process and reducing costs while maintaining the precision required for both frequency operations.
2Adaptability or versatility
If dual-mode RFID chip is used to operate in both HF and UHF frequencies, then device versatility is improved, but device complexity increases
Solution Approach 1:
The patent separates the dual-frequency system into distinct HF and UHF subsystems, each with dedicated antennas and chip pairs. This segmentation reduces the complexity within each subsystem while maintaining overall versatility through the ability to operate in both frequency bands.
Solution Approach 2:
The patent uses a substrate as an intermediary element that electrically couples the HF and UHF antenna-chip pairs. This intermediary structure simplifies the integration of dual-mode functionality by providing a common platform for both frequency systems, reducing overall device complexity while maintaining adaptability.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach reduces manufacturing costs and enables efficient production of dual-mode RFID devices with reduced material wastage, allowing for easy configuration and integration with UHF antennas formed without etching, thereby enhancing sustainability and scalability.
Implementation Method 1
couple magnetically, conductively, or capacitively with a UHF antenna
Implementation Method 2
couple magnetically, conductively, or capacitively with a UHF antenna
Implementation Method 3
The disruptions direct a high frequency current around the turns of the multi-turn high frequency antenna, while allowing an ultra high frequency current to flow across the disruptions
Data Source
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Figure 4
AI summary
Dual-mode RFID devices are provided with an integrated dual-mode RFID strap including either a UHF/HF dual-mode RFID chip or the combination of a UHF RFID chip and an HF RFID chip. An HF antenna and a UHF antenna are both coupled to the integrated dual-mode RFID strap, with the UHF antenna being formed by an approach other than etching, such as a cutting or printing operation, thereby reducing the cost to manufacture the device. If a pair of chips is employed, one of the chips may have a greater thickness than the other chip, which allows for the thicker chip to be incorporated into the device after the thinner chip without requiring a minimum separation between the two chips due to the size of a thermode used to secure the chips. Additionally, the first chip may be tested before securing the second chip, thereby limiting the cost of a rejected device.