Dual-Mode Signal Processing Circuitry for Lower Power Consumption

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Solution Overview

Problem

Wireless communication systems face inefficiencies in power consumption due to circuitry designed for peak performance modes, which are not always required, leading to significant energy wastage during lower-performance intervals.

Innovation Solution

Implementing a dual-mode signal processing system with a high-performance instance and a high-efficiency instance, where the high-efficiency instance is optimized for energy efficiency using lower voltage supplies and reduced processing resources, and the high-performance instance handles peak demands.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If circuitry is configured to handle peak performance modes, then processing capability is improved, but power consumption increases significantly during lower-performance intervals

Engineering Contradiction:
Improveprocessing capabilityVSAvoidpower consumption
Core Design Contradiction:
ProductivityVSUse of energy by moving object

Solution Approach 1:

The patent divides the signal processing circuitry into two separate instances: a first instance optimized for high performance and a second instance optimized for energy efficiency. This segmentation allows the system to select the appropriate instance based on current performance requirements, avoiding the energy waste of running a high-performance instance when only basic processing is needed.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The system dynamically switches between the first and second signal processing instances based on real-time performance requirements. The switching mechanism allows the system to adapt its processing capability to match actual workload demands, thereby optimizing power consumption while maintaining necessary performance levels.

Inventive Principle:
Principle #15Dynamics

2Reliability

If a single high-performance processing instance is used, then peak performance requirements are met, but energy efficiency deteriorates during lower-performance modes

Engineering Contradiction:
Improveperformance consistencyVSAvoidenergy efficiency
Core Design Contradiction:
ReliabilityVSLoss of energy

Solution Approach 1:

The patent applies different optimization qualities to different processing instances: the first instance is locally optimized for high performance with corresponding hardware resources, while the second instance is locally optimized for energy efficiency with reduced resources. This local quality differentiation allows each instance to excel at its intended function without compromising the other.

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

The system changes operational parameters by switching between two distinct processing configurations. The first instance uses parameters optimized for speed and performance (higher voltage, more resources), while the second instance uses parameters optimized for energy efficiency (lower voltage, fewer resources). This parameter change approach resolves the contradiction by having discrete optimized states rather than a single compromise state.

Inventive Principle:
Principle #35Parameter changes

Data Source

PatentUS12349059B2Energy-efficient processing
Publication Date: 2025.07.01 APPLE INC
  • US12349059B2 patent drawing
  • US12349059B2 patent drawing
  • US12349059B2 patent drawing

AI summary

In some embodiments, an apparatus includes first circuitry configured to perform a computation that uses a matrix as an input and second circuitry configured to perform the computation, where the second circuitry includes a smaller amount of processing resources than the first circuitry. The second circuitry may begin performing the computation on at least a portion of a set of input data. One or more storage elements may store context information for the second circuitry, where the context information includes outputs from the computation performed on the at least a portion of the set of input data. Based on the at least a portion of the set of input data, the apparatus may activate the first circuitry to complete the computation, where the completion uses the outputs of the computation performed by the second circuitry, included in the context information, as an intermediate result.