Dual-Mode Frequency Synthesizer for Low-Frequency Spur Suppression

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Solution Overview

Problem

Existing frequency synthesizers face challenges in suppressing low-frequency parasitic emissions, particularly when the output signal frequency is near the center of the frequency band, leading to disturbances in the output signal due to unfiltered noise components.

Innovation Solution

A broadband frequency synthesizer employing a dual-mode divider circuit with a switch element that selects between two sets of division factors, allowing for effective suppression of low-frequency parasitic emissions by shifting the frequency band when the signal is near the center, using a sigma-delta modulator for mode selection and a low-pass filter to filter out high-frequency noise.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Object-affected harmful factors

If a sigma-delta modulator is used for mode selection in a dual-mode divider circuit, then high-frequency noise is pushed towards frequencies above the low-pass filter cutoff, but low-frequency parasitic emissions occur near the center of the frequency band due to rare mode transitions

Engineering Contradiction:
Improvehigh-frequency noiseVSAvoidlow-frequency parasitic emissions
Core Design Contradiction:
Object-affected harmful factorsVSObject-generated harmful factors

Solution Approach 1:

The patent introduces a dynamic frequency offset mechanism that continuously adjusts the center frequency of the synthesizer. By dynamically changing the reference frequency or VCO tuning range, the system ensures that the operating point never remains stationary at the band center, thereby preventing the accumulation of low-frequency parasitic emissions while preserving the high-frequency noise shaping benefit of the sigma-delta modulator

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The patent applies preliminary anti-action by intentionally introducing a frequency offset before the parasitic emissions can accumulate. The system proactively shifts the operating frequency away from the band center by a predetermined offset amount, preventing the formation of low-frequency spurious components before they can disturb the output signal

Inventive Principle:
Principle #9Preliminary anti-action

2Adaptability or versatility

If the synthesizer operates with a fixed frequency band covering a wide range, then frequencies at low and high limits can be programmed, but low-frequency parasitic emissions are suppressed only at the center frequency

Engineering Contradiction:
Improvefrequency band coverageVSAvoidlow-frequency parasitic emissions
Core Design Contradiction:
Adaptability or versatilityVSObject-affected harmful factors

Solution Approach 1:

The patent extends the dynamic frequency offset mechanism across the entire frequency band. By continuously adjusting the center frequency or applying a dynamic offset that varies with the programmed frequency, the system maintains suppression of low-frequency parasitic emissions regardless of whether the operating frequency is near the center, low limit, or high limit of the band

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The patent changes the operating parameters (frequency offset, reference frequency, or VCO tuning range) based on the programmed output frequency. When the synthesizer is programmed to operate at frequencies near the band limits, the system adjusts parameters to maintain adequate separation from the band center, thereby preventing low-frequency parasitic emissions across the entire frequency range

Inventive Principle:
Principle #35Parameter changes

Data Source

PatentEP2080269B1Broadband frequency synthesizer with elimination of low-frequency parasitic emissions
Publication Date: 2010.08.18 THE SWATCH GRP RES & DEVELONMENT LTD
  • EP2080269B1 patent drawingFigure 1
  • EP2080269B1 patent drawingFigure 2

AI summary

The broadband frequency synthesizer (1) comprises a voltage-controlled oscillator (4) for providing an output signal at high frequency (FS), a dual-mode divider circuit (5), a means for selecting mode of division (9) of the divider circuit, a phase detector (2) and a low-pass filter (3). The phase detector (2) compares a signal of reference frequency (Fref) with a signal of divided frequency (Fdiv) of the divider circuit so as to provide a signal which is filtered for controlling the voltage of the oscillator (4). The divider circuit (5) divides the frequency of the output signal by a first factor N1 in a first mode M1 or by a second factor N2 different from the factor N1 in a second mode M2 so as to provide the divided-frequency signal (Fdiv). The selection means (9) selects by determined time period the first mode or the second mode of division of the divider circuit as a function of the programmed frequency of the output signal in the frequency band defined by the first and second division factors N1 and N2. If this frequency is close to the centre of the band, the dual-mode divider circuit divides the frequency of the output signal by a third factor N3 in a first mode M1 or by a fourth factor N4 different from the third factor N3 in a second mode M2 according to a programming of the selection means (9). At least the third or the fourth factor N3 or N4 is different from the first or second factor N1 or N2. In this way, the centre of the frequency band defined by the third and fourth factors N3 and N4 is shifted with respect to the programmed frequency of the output signal.