Dual Mode Switching Regulator PWM PFM Frequency Control

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

Conventional switching regulators face inefficiencies in voltage regulation at low load conditions, as they often require transitioning to PFM mode, which can lead to reduced switching frequency and increased power consumption.

Innovation Solution

A dual mode switching regulator with a PWM/PFM control architecture that extends the switching cycle off-time based on load conditions, allowing for seamless transition between PWM and PFM modes, thereby optimizing power conversion efficiency across varying load currents.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Loss of energy

If the switching regulator operates in PWM mode at nominal switching frequency, then voltage regulation is maintained, but power consumption increases at low load conditions

Engineering Contradiction:
Improvepower consumptionVSAvoidswitching frequency
Core Design Contradiction:
Loss of energyVSSpeed

Solution Approach 1:

The switching regulator dynamically adjusts the switching frequency based on load conditions. At low load currents, the regulator transitions from fixed-frequency PWM mode to variable-frequency PFM mode, where the switching frequency is reduced to minimize power consumption while maintaining voltage regulation. This dynamic adaptation resolves the contradiction between maintaining regulation and reducing power loss.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The regulator changes the operating parameters by transitioning between PWM and PFM modes. In PFM mode, the switching frequency parameter is variable rather than fixed, allowing the system to operate at lower frequencies during light loads, thereby reducing switching losses and improving overall efficiency.

Inventive Principle:
Principle #35Parameter changes

2Loss of energy

If the switching frequency is reduced in PFM mode, then power consumption decreases, but voltage regulation precision deteriorates

Engineering Contradiction:
Improvepower consumptionVSAvoidvoltage regulation precision
Core Design Contradiction:
Loss of energyVSMeasurement precision

Solution Approach 1:

The regulator employs a feedback control mechanism that continuously monitors the output voltage and adjusts the switching frequency accordingly. This feedback ensures that even in PFM mode with variable frequency, the output voltage remains precisely regulated according to the reference voltage, eliminating the trade-off between power consumption and regulation precision.

Inventive Principle:
Principle #23Feedback

3Loss of energy

If the regulator transitions to PFM mode at low load conditions, then efficiency improves, but switching frequency variability increases

Engineering Contradiction:
Improvepower consumptionVSAvoidswitching frequency stability
Core Design Contradiction:
Loss of energyVSStability of the object's composition

Solution Approach 1:

The system dynamically adapts its switching frequency based on real-time load conditions. The transition between PWM and PFM modes is controlled by comparing the load current with a threshold, ensuring stable operation in PWM mode under normal conditions and enabling frequency variability only when necessary for efficiency at light loads.

Inventive Principle:
Principle #15Dynamics

Data Source

PatentUS11031869B2Dual mode switching regulator with PWM/PFM frequency control
Publication Date: 2021.06.08 TEXAS INSTRUMENTS INC
  • US11031869B2 patent drawing
  • US11031869B2 patent drawing
  • US11031869B2 patent drawing

AI summary

A dual mode switching regulator includes a PWM/PFM control architecture with PFM frequency foldback based on extending switching cycle off time TOFF. A controller includes a PWM/PFM clock generator that, in response to assertion of a TOFF control signal, extends the nominal PWM switching cycle off-time TOFFnom for an extended off-time TOFFext (variable), so that switching cycle off-time is [TOFFnom+TOFFext]. A TOFF modulator generates the TOFF control signal based on generating a TOFF control voltage from an ITOFF control current equal to [IPWM-IPFM], generated by sourcing an IPWM reference current, and, in response to a PFM load condition, sinking an IPFM control current. The TOFF control signal is asserted when the TOFF control voltage is not substantially equal to a TOFF reference voltage at the end of TOFFnom, to cause the PWM/PFM clock generator to extend switching cycle off-time to [TOFFnom+TOFFext], with the duration of TOFFext determining PFM switching frequency.