Dual Mode Single Temperature Trimming for Electronic Devices
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Solution Overview
Problem
Current manufacturing methods are inadequate in addressing combined gain and offset errors in circuits simultaneously, as they either require multiple temperatures for calibration, are costly, complex, or consume excessive power, especially when dynamic element matching is employed.
Innovation Solution
A dual mode single temperature trim system that utilizes a dynamic element matching control and a process trim module to isolate and remove temperature-dependent errors, with a mismatch trim module addressing mismatch errors at a single temperature, enabling efficient calibration without the need for multiple temperature settings.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If measurements are made at two separate temperatures to separate gain and offset errors, then measurement precision is improved, but manufacturing time and process complexity increase
Solution Approach 1:
The patent employs dynamic element matching (DEM) technique that dynamically switches between matched and unmatched states of circuit elements at a single temperature. This dynamic switching creates artificial temperature-dependent error signatures that allow separation of gain and offset errors without actual temperature changes, resolving the contradiction by maintaining measurement precision while eliminating time loss.
Solution Approach 2:
The invention changes the operational state parameters of circuit elements (matched/unmatched configuration) rather than changing physical temperature. By modulating the matching state of parallel circuit paths, the system generates distinguishable error patterns that enable gain and offset error separation at constant temperature, thus improving measurement precision without the time penalty of thermal cycling.
2Measurement precision
If two separate temperature processes are used for trimming, then error separation is improved, but device complexity and manufacturing cost increase
Solution Approach 1:
The patent segments the error measurement process into two independent digital signal processing steps: first extracting gain error components, then extracting offset error components. This segmentation allows both error types to be separated and trimmed using a single temperature process, reducing manufacturing complexity while maintaining the precision benefits of error separation.
Solution Approach 2:
The invention introduces an intermediary mathematical processing stage that acts on the measured error signals. By applying signal processing algorithms to the raw error data, the system separates gain and offset components without requiring physical temperature separation, thus reducing device and process complexity while maintaining measurement precision.
3Measurement precision
If dynamic element matching is used to remove offset errors, then offset error reduction is improved, but power consumption increases
Solution Approach 1:
The patent applies dynamic element matching selectively only during the offset error trimming phase, rather than continuously. The DEM circuit is activated only when offset calibration is required, and then deactivated during normal operation or when only gain trimming is needed. This partial application maintains offset error removal effectiveness while significantly reducing overall power consumption.
Data Source
AI summary
In a system for performing a dual mode single temperature trim upon an electronic device to remove combined mismatch and process variation errors, a dynamic element matching control is configured for enabling dynamic element matching of components of the electronic device. A process trim module is configured for performing a process trim to remove a temperature dependant error from the electronic device while the dynamic element matching is enabled within the electronic device. A mismatch trim module is configured for performing a mismatch trim to remove a mismatch error from the electronic device after the process trim has been performed. The mismatch trim is performed on a portion of the electronic device for which the dynamic element matching has been disabled. Additionally, the mismatch trim is performed at substantially an equivalent temperature to a temperature at which the process trim was performed.