Dual Molding Semiconductor Package for Warpage Control
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Solution Overview
Problem
Semiconductor packages face warpage issues due to differences in thermal expansion coefficients between components, leading to mechanical and electrical defects, which existing technologies have not adequately addressed.
Innovation Solution
A semiconductor package design featuring a dual molding layer structure with a redistribution structure that includes a wiring pattern and a conductive post, where the thermal expansion coefficients of the molding layers are distinct, balancing stress and reducing thermal expansion stress between the semiconductor chip and the circuit substrate.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Device complexity
If a single molding layer is used in semiconductor packages, then the manufacturing process is simple, but warpage occurs due to thermal expansion coefficient differences between components
Solution Approach 1:
The molding layer is divided into two separate layers: a first molding layer surrounding the semiconductor chip and a second molding layer surrounding the conductive post. This segmentation allows each layer to have different thermal expansion coefficients, enabling stress compensation and warpage prevention while maintaining manufacturing feasibility.
Solution Approach 2:
The patent employs a composite molding structure where the first and second molding layers are made of different materials with distinct thermal expansion coefficients. This composite approach creates a balanced stress distribution that prevents warpage, addressing the reliability issue without significantly increasing manufacturing complexity.
2Reliability
If molding layers with different thermal expansion coefficients are used, then warpage is prevented, but the manufacturing process becomes more complex
Solution Approach 1:
By segmenting the molding structure into two functionally distinct layers, the patent achieves warpage prevention through differential thermal expansion while maintaining a manageable manufacturing process. Each layer serves a specific purpose: the first layer protects the chip, and the second layer manages the conductive post, simplifying the overall design complexity.
3Stability of the object's composition
If a dual molding layer structure with different thermal expansion coefficients is implemented, then stress is balanced and warpage is reduced, but the device complexity increases
Solution Approach 1:
The patent changes the thermal expansion coefficient parameter by using different materials for the first and second molding layers. This parameter variation enables stress balance and warpage reduction, while the systematic approach to material selection and layer configuration keeps the device complexity manageable.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This design effectively prevents warpage of semiconductor packages and modules by offsetting stress and enhancing reliability through the use of a dual molding layer structure with different thermal expansion coefficients, reducing contact resistance and improving mechanical stability.
Implementation Method 1
a thermal expansion coefficient of the second molding layer is different from a thermal expansion coefficient of the first molding layer
Data Source
AI summary
A semiconductor package includes an upper structure including a semiconductor chip and a first molding layer for molding the semiconductor chip, a lower structure provided on the upper structure, the lower structure including a conductive post and a second molding layer for molding the conductive post, and a redistribution structure provided between the upper structure and the lower structure, the redistribution structure including a wiring pattern for electrically connecting a pad of the semiconductor chip to the conductive post, in which a thermal expansion coefficient of the second molding layer is different from a thermal expansion coefficient of the first molding layer.