Dual Multiplication Data Path for Parallel DSP Processing

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Solution Overview

Problem

Digital signal processors face challenges in efficiently processing real-time data streams due to limitations in memory bandwidth and scheduling, particularly in applications requiring predictable non-sequential input patterns.

Innovation Solution

The implementation of a dual multiplication unit architecture in a data path, allowing for parallel execution of single issue multiply instructions and improved memory management through an autonomous streaming engine that enhances data scheduling and bandwidth, specifically designed for real-time data processing.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If a single multiplication unit is used in the data path, then the device complexity is low, but the processing speed and productivity are limited

Engineering Contradiction:
Improveprocessing speedVSAvoiddevice complexity
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The multiplication unit is segmented into two separate multiplication units (first multiplication unit and second multiplication unit) that operate independently in parallel. Each unit handles single issue multiply instructions separately, allowing simultaneous execution of multiple multiplication operations without increasing the complexity of individual units.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

Two multiplication units are merged into the same data path, sharing common resources such as the data path infrastructure, control logic, and result storage mechanisms. This merging approach enables parallel processing while avoiding the need for completely separate processing pipelines.

Inventive Principle:
Principle #5Merging (Combining)

2Productivity

If memory bandwidth is increased to handle real-time data streams, then the data processing capability is improved, but the device complexity and cost increase

Engineering Contradiction:
Improvedata processing capabilityVSAvoiddevice complexity
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The autonomous streaming engine ensures continuous data flow from memory to the multiplication units by autonomously managing data scheduling and bandwidth allocation. This continuous action eliminates idle time and ensures that the multiplication units always have data to process, maximizing the utility of existing memory bandwidth without requiring additional memory resources.

Inventive Principle:
Principle #20Continuity of useful action

Data Source

PatentUS11921643B2Method and apparatus for dual multiplication units in a data path
Publication Date: 2024.03.05 TEXAS INSTRUMENTS INC
  • US11921643B2 patent drawing
  • US11921643B2 patent drawing
  • US11921643B2 patent drawing

AI summary

A processor is provided that includes a first multiplication unit in a first data path of the processor, the first multiplication unit configured to perform single issue multiply instructions, and a second multiplication unit in the first data path, the second multiplication unit configured to perform single issue multiply instructions, wherein the first multiplication unit and the second multiplication unit are configured to execute respective single issue multiply instructions in parallel.