Dual Multiplication Units for Parallel DSP Data Paths

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Solution Overview

Problem

Digital signal processors face challenges in efficiently processing real-time data streams due to memory bandwidth limitations and scheduling constraints, particularly in applications requiring predictable but non-sequential input data patterns.

Innovation Solution

Incorporating dual multiplication units in a data path that allow for parallel execution of single issue multiply instructions, enhancing the processing capabilities of digital signal processors by improving memory bandwidth and data scheduling through an autonomous streaming engine capable of managing multiple data streams.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If a single multiplication unit is used in the data path, then the device complexity is reduced, but the processing speed and productivity are limited due to sequential execution of multiply instructions

Engineering Contradiction:
Improveprocessing speedVSAvoiddevice complexity
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The multiplication unit is segmented into multiple independent multiplication units (first multiplication unit and second multiplication unit), each capable of executing multiply instructions independently in parallel. This segmentation allows simultaneous execution of multiple multiply operations, thereby increasing processing speed without requiring a complete redesign of the data path architecture.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent introduces parallelism as an additional dimension of execution by adding multiple multiplication units that operate simultaneously. Instead of improving the single multiplication unit's speed, the solution adds another dimension (parallel execution paths) to the data path, allowing multiple instructions to be processed concurrently while maintaining the original sequential data flow structure.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

2Productivity

If memory bandwidth is increased to handle more data streams, then the data processing capability is improved, but the device complexity and cost increase

Engineering Contradiction:
Improvedata processing capabilityVSAvoiddevice complexity
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

Multiple data streams are merged into a single data path that feeds both multiplication units. The autonomous streaming engine consolidates memory access and data scheduling for multiple streams, allowing the system to process multiple data streams simultaneously without proportionally increasing memory bandwidth requirements or device complexity.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The single data path is designed to be universal and can handle multiple data streams interchangeably. The autonomous streaming engine provides multi-functional capabilities by managing different data streams through the same hardware resources, thereby improving data processing capability without adding dedicated paths for each stream.

Inventive Principle:
Principle #6Universality (Multi-functionality)

3Productivity

If the number of multiplication units is increased to process more instructions in parallel, then the productivity is improved, but the area occupied in the integrated circuit increases

Engineering Contradiction:
Improveparallel execution capabilityVSAvoidarea occupied
Core Design Contradiction:
ProductivityVSArea of stationary object

Solution Approach 1:

Each multiplication unit is designed with localized, dedicated resources for its specific function. The first and second multiplication units have separate operand sources and result destinations, allowing them to operate independently with minimal资源共享. This local quality approach enables parallel execution while controlling the area occupied by ensuring each unit has only the resources it specifically needs.

Inventive Principle:
Principle #3Local quality

Data Source

PatentUS20260017207A1Multiple Multiplication Units in a Data Path
Publication Date: 2026.01.15 TEXAS INSTRUMENTS INC
  • US20260017207A1 patent drawing
  • US20260017207A1 patent drawing
  • US20260017207A1 patent drawing

AI summary

A processor is provided that includes a first multiplication unit in a first data path of the processor, the first multiplication unit configured to perform single issue multiply instructions, and a second multiplication unit in the first data path, the second multiplication unit configured to perform single issue multiply instructions, wherein the first multiplication unit and the second multiplication unit are configured to execute respective single issue multiply instructions in parallel.