Dual Multiplication Units for Parallel DSP Data Paths
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Solution Overview
Problem
Digital signal processors face challenges in efficiently processing real-time data streams due to memory bandwidth and scheduling constraints, particularly in applications requiring predictable but non-sequential input data patterns, which can lead to delays in outputting transformed data.
Innovation Solution
Incorporating dual multiplication units in a data path that allow for parallel execution of single issue multiply instructions, enhancing the processing capability of digital signal processors by improving memory bandwidth and data scheduling through an autonomous streaming engine capable of managing multiple data streams.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If a single multiplication unit is used in the data path, then the device complexity is low, but the processing speed and productivity are limited
Solution Approach 1:
The multiplication function is segmented into multiple independent multiplication units (first multiplication unit and second multiplication unit) that operate in parallel within the same data path. Each unit handles separate multiply instructions simultaneously, effectively doubling the throughput for multiplication operations without requiring separate data paths
2Productivity
If memory access is used to load data registers, then data can be supplied to functional units, but memory bandwidth constraints cause delays in outputting transformed data
Solution Approach 1:
The autonomous streaming engine performs preliminary actions by pre-fetching and buffering data from memory before the main processing pipeline requires it. This allows data to be staged in advance, reducing the impact of memory bandwidth constraints on overall processing throughput
3Productivity
If single issue multiply instructions are executed sequentially, then the implementation is simple, but the processing capability is limited
Solution Approach 1:
Two separate multiplication units are merged into a single data path, allowing parallel execution of multiply instructions that would traditionally require sequential processing. The units share common infrastructure such as the data path and control logic, reducing implementation complexity compared to fully independent processing pipelines
Data Source
AI summary
A processor is provided that includes a first multiplication unit in a first data path of the processor, the first multiplication unit configured to perform single issue multiply instructions, and a second multiplication unit in the first data path, the second multiplication unit configured to perform single issue multiply instructions, wherein the first multiplication unit and the second multiplication unit are configured to execute respective single issue multiply instructions in parallel.