Dual Network-on-Chip Architecture for Task Migration Efficiency
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Solution Overview
Problem
Current Network-on-Chip (NoC) technologies face challenges in dynamically managing computation and communication resources, especially with fine-grain reconfigurable hardware, due to limited memory and distinct communication protocols, leading to inefficiencies in task migration and traffic management.
Innovation Solution
The implementation of a dual on-chip network architecture with separate data and control traffic networks, allowing for efficient task relocation and traffic management by separating application data, OS control messages, and reconfiguration bitstreams, while using instruction address compare registers for preemption points and dynamic injection rate control to minimize interference and maximize scalability.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Device complexity
If a single Network-on-Chip is used to interconnect heterogeneous computing resources, then device complexity is reduced, but task migration efficiency deteriorates due to protocol conflicts and traffic interference
Solution Approach 1:
The patent divides the single NoC into two separate physical networks: a control network for OS management traffic and a data network for application data. This segmentation eliminates protocol conflicts and traffic interference, allowing simultaneous optimization of both control and data transmission without mutual interference, thereby improving task migration efficiency while maintaining manageable device complexity through systematic separation.
Solution Approach 2:
The patent extracts control traffic handling from the data network by implementing a dedicated control network. The OS control messages, reconfiguration bitstreams, and task migration traffic are separated from application data traffic. This extraction allows the data network to focus purely on data transmission while the control network handles management functions, resolving the contradiction between network simplicity and migration efficiency.
2Adaptability or versatility
If memory resources are increased to support task migration, then task relocation capability is improved, but device complexity and resource overhead increase
Solution Approach 1:
The patent introduces a dedicated control network as an intermediary for task migration communication. Instead of using general-purpose memory resources for all migration-related communications, the control network provides specialized communication paths for OS control messages and task state transfers. This intermediary approach enables efficient task relocation without requiring excessive memory resources, as the control network handles the coordination and state transfer protocols.
3Ease of operation
If communication protocols are unified across all traffic types, then ease of operation is improved, but task migration performance deteriorates due to protocol overhead and interference
Solution Approach 1:
The patent segments communication protocols by network type: the control network uses specialized protocols optimized for OS management and task migration, while the data network uses protocols optimized for application data transmission. This segmentation allows each network to operate with protocols tailored to its specific requirements, improving task migration performance without sacrificing operational simplicity, as each network's protocol design is straightforward and purpose-specific.
Data Source
AI summary
Network on Chip (NoC) Devices, especially Heterogeneous Multiprocessor Network on Chip Devices are described, that optionally contain Reconfigurable Hardware Tiles, as well as Methods and Operating Systems (OS) for Control thereof. In accordance with an aspect of the present invention the Operating Systems handle either (a) run-time traffic management methods or (b) task migration methods, or a combination of these methods. The Operating Systems may be partly distributed but with a centralized master. The traffic management methods and apparatus of the invention use a statistical QoS approach. A system is described having an at least dual Network on Chip as well as methods of operating the same. The system has at least an on-chip communications network, comprising a first on-chip data traffic network (data NoC) and a second on-chip control traffic network (control NoC), having a control network interface component (control NIC) and a data network interface component (data NIC).