Dual Non-Volatile Memory Storage Device with Asymmetric Addressing
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Solution Overview
Problem
NAND flash memory devices experience latency issues due to delay times in responding to read, program, and erase commands, which affect user perception of performance.
Innovation Solution
A storage device system with two non-volatile memory banks that mirror each other, using different address assignment policies to reduce bank collisions and latency, where a controller simultaneously issues read commands to both banks and outputs the earlier data response.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Loss of time
If read commands are issued to a single memory bank, then the system is simple to control, but latency increases due to sequential operation delays
Solution Approach 1:
The memory system is divided into multiple independent memory banks (first memory bank and second memory bank), each capable of autonomous operation. This segmentation allows parallel processing of read commands, reducing latency by eliminating sequential operation delays while maintaining manageable control complexity through modular architecture.
Solution Approach 2:
The patent introduces a new dimension of parallelism by operating multiple memory banks simultaneously rather than sequentially in a single dimension. By issuing read commands to both the first and second memory banks at the same time, the system achieves temporal parallelism, effectively reducing latency without proportionally increasing control complexity.
2Productivity
If the same address assignment policy is used in both memory banks, then address management is simplified, but bank collisions occur reducing performance
Solution Approach 1:
The patent employs asymmetric address assignment policies in the two memory banks. The first memory bank uses a first address assignment policy while the second memory bank uses a second address assignment policy that is intentionally different. This asymmetry distributes memory access patterns across both banks more evenly, preventing bank collisions and improving data access speed, while the address translation logic manages the complexity of maintaining multiple assignment policies.
Data Source
AI summary
A storage device includes a first non-volatile memory comprising a plurality of first banks having a plurality of first addresses and a second non-volatile memory comprising a plurality of second banks having a plurality of second addresses assigned to each according to different assignment policies, and a controller. The plurality of second addresses corresponds to the plurality of first addresses. The second non-volatile memory mirrors data items stored in the first addresses to store them in the second addresses. The controller is configured to receive a command from a host to control the first non-volatile memory and the second non-volatile memory. The controller provides a read command received from the host simultaneously to first and second non-volatile memories, and outputs to the host an earlier one between data provided from the first non-volatile memory and data provided from the second non-volatile memory based on the read command.