Dual-OS Chip Architecture for Split-Bus Hardware Control
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Solution Overview
Problem
Current systems using hardware logic devices like CPLD, EC chips, or control chips increase system costs and reduce the efficiency of operating systems due to increased interaction across devices.
Innovation Solution
Implementing a chip with a processor, a hardware controller, and two buses with different bandwidth configurations to allow two operating systems to communicate and control hardware resources efficiently, avoiding the need for additional hardware devices.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If hardware logic devices (CPLD, EC chip, control chip) are used to achieve device control, then device control capability is improved, but system cost increases and operating system running efficiency decreases
Solution Approach 1:
The patent merges the functions of hardware logic devices (CPLD, EC chip, control chip) with the processor by implementing a dual operating system architecture where one OS manages hardware resources and another OS handles application tasks. This integration eliminates the need for separate hardware control chips, thereby reducing system cost and improving OS running efficiency while maintaining device control capability.
Solution Approach 2:
The processor is designed to perform multiple functions by running different operating systems simultaneously - one OS dedicated to hardware resource management and another OS for application execution. This multi-functionality approach replaces specialized hardware logic devices with a universal processor that can handle both control and computation tasks, reducing system complexity and cost.
2Adaptability or versatility
If hardware logic devices are added to the system, then device control functions are enhanced, but the number of devices increases leading to more inter-device interactions
Solution Approach 1:
The patent combines multiple device functions into a single processor by implementing a dual operating system architecture. Instead of having separate hardware logic devices for control functions, the processor runs one OS specifically for hardware resource management, thereby reducing the number of physical devices and their inter-device interactions while maintaining enhanced device control functions.
3Manufacturing precision
If separate hardware control devices are used, then hardware control precision is improved, but system cost and device interaction complexity increase
Solution Approach 1:
The patent segments the operating system into two distinct parts running on the same processor: one OS dedicated to hardware resource management (providing precise hardware control) and another OS for application execution. This segmentation allows precise hardware control to be achieved through software architecture rather than additional hardware devices, thereby reducing system architecture complexity while maintaining control precision.
Data Source
AI summary
Provided in the embodiments of the present disclosure are a method and apparatus for controlling running of an operating system, and an embedded system and a chip. The embedded system includes a chip and at least two operating systems. The chip includes a processor, a hardware controller, a first bus, and a second bus. The bandwidth of the first bus is higher than the bandwidth of the second bus; the first bus is configured as a multi-master and multi-slave mode; and the second bus is configured as a one-master and multi-slave mode. The at least two operating systems are configured to run on the basis of the processor; the at least two operating systems are configured to communicate with each other by the first bus; and the at least two operating systems are configured to control the hardware controller by the second bus.