Dual-Oscillator Clock Adjustment for Precise USB Frequency Control

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Solution Overview

Problem

Existing USB device clock frequency adjustment methods are inadequate for achieving precise frequency adjustments, especially at high speeds, due to oscillator divergence and sensitivity to manufacturing variations and environmental changes, leading to insufficient precision and slow frequency settling times.

Innovation Solution

A method and circuit that utilize two oscillators with adjustable frequency, employing interpolation and calibration techniques to determine corrected command values, ensuring precise frequency adjustment by measuring frequency differences and applying correction values to achieve the desired clock frequency, even in high-frequency applications.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Device complexity

If a single oscillator is used for clock signal generation, then the device complexity is reduced, but the frequency adjustment precision deteriorates due to oscillator divergence and sensitivity to manufacturing variations

Engineering Contradiction:
Improveoscillator configurationVSAvoidfrequency adjustment precision
Core Design Contradiction:
Device complexityVSMeasurement precision

Solution Approach 1:

The patent divides the oscillator system into two separate oscillators (first oscillator and second oscillator) instead of using a single oscillator. Each oscillator is independently controlled and measured, allowing for more precise frequency adjustment through comparison and interpolation of their respective behaviors, thereby resolving the contradiction between device simplicity and adjustment precision.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent uses a second oscillator as a reference copy to characterize the frequency behavior and divergence patterns. By measuring and analyzing the second oscillator's response to control values, the system can predict and compensate for the first oscillator's behavior, achieving higher precision without significantly increasing overall system complexity.

Inventive Principle:
Principle #26Copying

2Speed

If the oscillator frequency is increased to meet high-speed USB requirements, then the data transfer rate is improved, but the frequency stability deteriorates due to increased sensitivity to manufacturing variations and environmental changes

Engineering Contradiction:
Improvedata transfer rateVSAvoidfrequency stability
Core Design Contradiction:
SpeedVSStability of the object's composition

Solution Approach 1:

The patent implements a feedback mechanism where the measured frequency of the oscillator is continuously monitored, compared against the desired frequency, and used to adjust the control value. This closed-loop feedback system compensates for frequency drift caused by manufacturing variations and environmental changes, maintaining stability even at high operating frequencies required for USB 2.0 full-speed mode.

Inventive Principle:
Principle #23Feedback

Solution Approach 2:

The patent dynamically adjusts the control value parameter based on measured frequency deviations and characterized oscillator behavior. By changing the control parameter according to the relationship established through measurement and interpolation, the system maintains frequency stability across varying conditions while operating at high speeds.

Inventive Principle:
Principle #35Parameter changes

3Ease of manufacture

If traditional frequency adjustment methods are used, then the device cost is reduced, but the frequency adjustment time increases and precision is insufficient for high-speed applications

Engineering Contradiction:
Improvedevice costVSAvoidfrequency settling time
Core Design Contradiction:
Ease of manufactureVSLoss of time

Solution Approach 1:

The patent performs preliminary characterization of the oscillator(s) by measuring frequency at different control values and storing this behavioral data. This pre-characterization allows the system to predict the optimal control value for a desired frequency, significantly reducing the time required for frequency adjustment compared to trial-and-error methods, while still using cost-effective integrated oscillators.

Inventive Principle:
Principle #10Preliminary action

Data Source

PatentEP3120458B1Method and circuit for adjusting a clock signal
Publication Date: 2018.03.28 WISEKEY SEMICONDUCTORS
  • EP3120458B1 patent drawingFigure 1~3
  • EP3120458B1 patent drawingFigure 4~5
  • EP3120458B1 patent drawingFigure 6~8

AI summary

In a general aspect, a method for adjusting an oscillator clock frequency can include applying a first control value to a first oscillator, applying a second control value, different from the first control value, to a second oscillator, measuring a frequency of each of the first and second oscillators, determining, by interpolation, a corrected frequency measurement of the second oscillator depending on a frequency deviation measured between the first and second oscillators when subjected to a third control value, on the third control value, and on the control value applied to the second oscillator, determining by interpolation a new first control value depending on the measured frequency of the first oscillator, on the corrected frequency, on the first and second control values, and on a desired frequency, and applying the new first control value to the first oscillator.