Dual-Oscillator Clock Switching for Fast FLL Start-Up

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Solution Overview

Problem

Conventional VCO-based FLLs have slow start-up times, which can make them unsuitable for applications requiring faster oscillation circuitry.

Innovation Solution

The proposed oscillator circuitry includes a fast start-up oscillator and a voltage-controlled oscillator (VCO), with a lock detector that switches the output from the fast start-up oscillator to the VCO once a stable phase lock is detected, enabling faster start-up times.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If a conventional VCO-based FLL is used, then high accuracy is achieved once stabilized, but start-up time becomes extremely slow (up to around 100 μs)

Engineering Contradiction:
Improvefrequency accuracyVSAvoidstart-up time
Core Design Contradiction:
Measurement precisionVSLoss of time

Solution Approach 1:

The fast start-up oscillator generates a clock signal immediately upon power-up, providing preliminary timing action before the VCO can stabilize. This preliminary clock signal allows the system to function during the VCO's warm-up period, effectively resolving the contradiction between immediate operation and eventual accuracy.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The fast start-up oscillator acts as an intermediary component that bridges the gap between power-up and VCO stabilization. It provides a temporary clock signal that mediates the system's timing requirements during the transition period, allowing the FLL to eventually lock to the more accurate VCO signal.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Loss of time

If a fast start-up oscillator is added to reduce start-up time, then start-up time is significantly reduced (to less than 1 nanosecond), but device complexity increases

Engineering Contradiction:
Improvestart-up timeVSAvoidcircuit complexity
Core Design Contradiction:
Loss of timeVSDevice complexity

Solution Approach 1:

The patent combines the fast start-up oscillator with the existing VCO and FLL circuitry into a unified system. The oscillators are merged through shared control logic and frequency detection mechanisms, allowing the complex functionality to be integrated rather than implemented as separate standalone systems.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The fast start-up oscillator serves multiple functions: it provides immediate clock signaling upon power-up, enables early FLL operation, and eventually hands off to the VCO once stabilized. This multi-functionality justifies the added complexity by delivering multiple benefits from a single component addition.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Data Source

PatentUS12267082B2Frequency-regulated oscillator circuit
Publication Date: 2025.04.01 NXP USA INC
  • US12267082B2 patent drawing
  • US12267082B2 patent drawing
  • US12267082B2 patent drawing

AI summary

Oscillator circuitry and methods of operation thereof are provided in which the oscillator circuitry includes at least a first oscillator, a second oscillator, and a lock detector. The first oscillator is configured to generate a first clock signal. The second oscillator is configured to generate a second clock signal. The lock detector is configured to detect a stable phase lock between the first clock signal and the second clock signal and to switch an output of the oscillator circuitry from the first clock signal to the second clock signal in response to detecting the stable phase lock.