Dual-Oxide TFT Structure for Stable Threshold Voltage
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Solution Overview
Problem
High-resolution flat panel display devices requiring high-speed driving face challenges in achieving high electron mobility and maintaining desired threshold voltage values due to the limitations of oxide-based semiconductor layers, particularly those using indium-gallium-zinc oxide (IGZO), which suffer from rapid threshold voltage shifts with channel length variations.
Innovation Solution
The use of a thin film transistor (TFT) with a dual oxide semiconductor layer structure, where the first layer consists of indium-gallium-zinc-tin oxide (IGZTO) with adjusted composition ratios to enhance electron mobility, and the second layer is made of indium-gallium-zinc oxide (IGZO) or IGZTO with different composition ratios, forming a hetero-junction structure to control charge density and prevent threshold voltage shifts.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If a single-layer IGZO semiconductor layer is used to reduce manufacturing cost, then manufacturing cost is reduced, but electron mobility is low and threshold voltage shifts rapidly with channel length variation
Solution Approach 1:
The single-layer IGZO semiconductor layer is divided into multiple layers with different compositions. The first layer contains IGZO with a first composition ratio, the second layer contains IGZO with a second composition ratio, and the third layer contains IGZO with a third composition ratio. This segmentation allows each layer to contribute differently to electron mobility and threshold voltage stability, resolving the contradiction between manufacturing simplicity and device performance reliability.
Solution Approach 2:
The patent uses composite oxide semiconductor materials with varying composition ratios across three layers. By combining different IGZO compositions (varying In, Ga, Zn ratios) in a multi-layer structure, the device achieves both high electron mobility (from optimized compositions) and stable threshold voltage (from the composite structure's resistance to channel length variations), while remaining manufacturable through established sputtering techniques.
2Productivity
If the channel length is shortened to achieve high-resolution display, then pixel density is improved, but threshold voltage shifts negatively by about -5V making it difficult to secure desired driving characteristics
Solution Approach 1:
Different regions of the semiconductor layer structure have different compositions optimized for specific functions. The first layer (closest to gate electrode) has composition optimized for threshold voltage control, the second layer has composition optimized for electron mobility, and the third layer has composition optimized for interface stability. This local quality differentiation allows short channel TFTs to maintain stable threshold voltage while achieving high pixel density.
Solution Approach 2:
The patent systematically varies composition parameters (atomic ratios of In, Ga, Zn) across the three layers. By changing these material parameters, the device achieves optimal electron mobility in the second layer while the first and third layers provide threshold voltage stability, enabling short channel operation at high pixel densities without the -5V negative shift problem.
3Speed
If a TFT with high electron mobility is used to achieve high-speed driving, then driving speed is improved, but the device complexity increases due to multiple layers with different composition ratios
Solution Approach 1:
The multi-layer structure is designed with dynamic composition gradients where each layer's composition is optimized for its specific position and function. This dynamic arrangement allows electrons to experience optimal mobility conditions at each interface and region, achieving high overall electron mobility and driving speed while the systematic composition variation provides inherent stability against threshold voltage shifts.
Data Source
AI summary
Disclosed are a thin film transistor (TFT) including an oxide semiconductor layer capable of being applied to high-resolution flat panel display devices requiring high-speed driving, a gate driver including the TFT, and a display device including the gate driver. The TFT includes first oxide semiconductor layer consisting of indium-gallium-zinc-tin oxide (IGZTO) and a second oxide semiconductor layer including indium-gallium-zinc oxide (IGZO). A content ratio (Ga/In) of gallium (Ga) to indium (In) of the second oxide semiconductor layer is higher than a content (Ga/In) of Ga to In of the first oxide semiconductor layer, and a content ratio (Zn/In) of zinc (Zn) to In of the second oxide semiconductor layer is higher than a content (Zn/In) of Zn to In of the first oxide semiconductor layer.