Dual-structured Passivation Layer for TFT Arcing Prevention
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Solution Overview
Problem
The existing thin-film transistor array panels for liquid crystal displays face arcing issues during the deposition of passivation layers, which can damage the substrate and affect the panel's performance.
Innovation Solution
A dual-structured passivation layer system is implemented, with the first passivation layer having a nitrogen-hydrogen to silicon-hydrogen bond ratio of 22 to 24 and the second layer having a ratio of 0.9 to 1.1, both made of silicon nitride, to prevent arcing and substrate damage during the deposition process.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a passivation layer is deposited using conventional methods, then the channel of the thin-film transistor is protected, but arcing occurs between metals on the deposition apparatus and the substrate causing defects
Solution Approach 1:
The patent changes the chemical composition parameters of the passivation layer by controlling the nitrogen-hydrogen to silicon-hydrogen bond ratio. The first passivation layer has an N-H to Si-H bond ratio of 22-24, while the second layer has a ratio of 0.9-1.1. This parameter change prevents arcing during deposition while maintaining protective function.
Solution Approach 2:
The patent uses a composite structure with two different passivation layers made of silicon nitride with different chemical compositions. The first layer (200-400 Å thick) has high N-H to Si-H bond ratio (22-24) to prevent arcing, while the second layer (2600-2800 Å thick) has low ratio (0.9-1.1) for stable protection, creating a composite protective system.
2Reliability
If the passivation layer is made thicker to improve protection, then channel protection is enhanced, but arcing risk increases during deposition
Solution Approach 1:
The patent divides the passivation layer into two segmented layers with different thicknesses and compositions. The first layer is thin (200-400 Å) with high N-H to Si-H bond ratio (22-24) to prevent arcing during deposition. The second layer is thick (2600-2800 Å) with low ratio (0.9-1.1) to provide substantial protection. This segmentation allows the total protective thickness to be achieved without arcing risks.
Data Source
AI summary
A thin-film transistor array panel includes an insulation substrate, a gate line disposed on the insulation substrate, a gate insulating layer disposed on the gate line, a semiconductor layer disposed on the gate insulating layer, a data line disposed on the semiconductor layer and including a source electrode, a drain electrode disposed on the semiconductor layer and facing the source electrode, a first electrode disposed on the gate insulating layer, a first passivation layer disposed on the first electrode and including silicon nitride, a second passivation layer disposed on the first passivation and including silicon nitride, and a second electrode disposed on the passivation layer, in which a first ratio of nitrogen-hydrogen bonds to silicon-hydrogen bonds in the first passivation layer is different from a second ratio of nitrogen-hydrogen bonds to silicon-hydrogen bonds in the second passivation layer.