Dual-Path Adder Circuit Power Mode Selection

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Solution Overview

Problem

Conventional adder circuits are inefficient in terms of power consumption and area utilization, especially when oversized for certain computing applications, and fail to optimize computing throughput effectively.

Innovation Solution

A special-purpose hardware circuit with a dual-path configuration that selects between a low-power mode and a high-power mode based on the sign and exponent attributes of inputs, routing inputs through a low-power adder section for most operations and a high-power adder section only when specific conditions are met, thereby reducing power consumption.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Use of energy by moving object

If a conventional adder circuit is used, then the circuit can perform addition operations, but it consumes substantial power and occupies large area without optimizing for specific applications

Engineering Contradiction:

Improvepower consumptionVSAvoidapplication-specific optimization

Core Design Contradiction:

Use of energy by moving objectVSAdaptability or versatility

Solution Approach 1:

The adder circuit is divided into two distinct segments: a low-power adder section and a high-power adder section. Each section is optimized for specific input conditions, allowing the circuit to segment its operation based on power consumption requirements while maintaining addition functionality.

Inventive Principle:

Principle #1Segmentation

Solution Approach 2:

The circuit dynamically switches between low-power and high-power adder sections based on input characteristics (sign and exponent attributes). This dynamic adaptation allows the circuit to optimize power consumption in real-time while maintaining versatility across different computing applications.

Inventive Principle:

Principle #15Dynamics

2Adaptability or versatility

If an oversized adder circuit is used, then the circuit can handle various computing applications, but it consumes excessive power and occupies unnecessary circuit die area

Engineering Contradiction:

Improvecomputing application coverageVSAvoidpower consumption

Core Design Contradiction:

Adaptability or versatilityVSUse of energy by stationary object

Solution Approach 1:

Inventive Principle:

Principle #1Segmentation

Solution Approach 2:

The circuit changes its operational parameters by selecting different adder sections based on input characteristics (sign and exponent attributes). This parameter change allows the circuit to adapt its power consumption level to match the actual computing requirements, avoiding excessive power usage.

Inventive Principle:

Principle #35Parameter changes

3Use of energy by moving object

If a dual-path adder circuit is used, then the circuit can reduce power consumption by selecting low-power mode frequently, but it increases device complexity

Engineering Contradiction:

Improvepower consumptionVSAvoidcircuit architecture

Core Design Contradiction:

Use of energy by moving objectVSDevice complexity

Solution Approach 1:

The input processor performs preliminary analysis of input attributes (sign and exponent) before routing inputs to the appropriate adder section. This preliminary action enables the circuit to select the optimal power mode in advance, reducing actual power consumption during addition operations.

Inventive Principle:

Principle #10Preliminary action

Solution Approach 2:

The input processor acts as an intermediary between the inputs and the adder sections, determining which adder section to use based on input characteristics. This intermediary component manages the complexity by centralizing the decision-making logic for power mode selection.

Inventive Principle:

Principle #24Intermediary (Mediator)

Data Source

PatentUS11586701B2Low-power adder circuit

Publication Date: 2023.02.21 GOOGLE LLC

AI summary

Methods, systems, and apparatus, including computer programs encoded on a computer storage medium, for a circuit configured to add multiple inputs. The circuit includes a first adder section that receives a first input and a second input and adds the inputs to generate a first sum. The circuit also includes a second adder section that receives the first and second inputs and adds the inputs to generate a second sum. An input processor of the circuit receives the first and second inputs, determines whether a relationship between the first and second inputs satisfies a set of conditions, and selects a high-power mode of the adder circuit or a low-power mode of the adder circuit using the determined relationship between the first and second inputs. The high-power mode is selected and the first and second inputs are routed to the second adder section when the relationship satisfies the set of conditions.