Dual-Path Floating-Point Operators With Shared Adder Architecture
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Solution Overview
Problem
As the number of floating-point operators in integrated circuit devices increases, from tens to thousands, existing technologies face inefficiencies in implementing these operators, leading to increased resource consumption and demand for more efficient designs.
Innovation Solution
The implementation of dual-path floating-point operators with separate near and far paths that diverge and converge to share circuitry, utilizing a shared adder/subtractor and combining count leading zeros and shifting functions into a single circuit, along with efficient rounding techniques to reduce latency and area usage.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If the number of floating-point operators is increased to handle more computations, then processing capability is improved, but resource consumption and area usage increase
Solution Approach 1:
The patent merges the count-leading-zeros circuit and normalization shifter into a single combined circuit that performs both functions simultaneously. The count-leading-zeros logic identifies the position of the most significant bit while the shifter performs normalization, eliminating the need for separate circuits and reducing overall area consumption while maintaining processing capability
Solution Approach 2:
The adder/subtractor circuit is designed to serve dual purposes: it performs both addition and subtraction operations for different paths (far path and near path) in the floating-point operator. This multi-functionality reduces the total number of arithmetic circuits needed, thereby reducing area usage while maintaining processing capability
2Device complexity
If traditional floating-point operator designs are used, then implementation is simpler, but latency increases and timing closure becomes difficult
Solution Approach 1:
The floating-point operator is divided into distinct paths: a far path for operations with larger exponent differences and a near path for operations with smaller exponent differences. Each path is optimized independently with dedicated circuitry for its specific operation type, reducing the critical path delay and overall latency while maintaining manageable implementation complexity
Solution Approach 2:
The exponent comparison and path selection are performed early in the operation pipeline, before the actual arithmetic computation. This preliminary action allows the appropriate path to be activated in advance, enabling parallel processing preparation and reducing overall latency without significantly increasing implementation complexity
3Ease of manufacture
If separate circuits are used for count-leading-zeros and shifting functions, then functionality is more modular, but area usage increases
Solution Approach 1:
The count-leading-zeros circuit and normalization shifter are merged into a single combined circuit that performs both functions simultaneously. The count-leading-zeros logic identifies the position of the most significant bit while the shifter performs normalization, eliminating the need for separate circuits and reducing overall area consumption while maintaining processing capability
Data Source
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AI summary
Systems and methods related to performing arithmetic operations on floating-point numbers. Floating-point arithmetic circuitry is configured to receive two floating-point numbers. The floating-point arithmetic circuitry includes a first path configured to perform a first operation on the two floating-point numbers based at least in part on a difference in size between the two floating-point numbers. The floating-point arithmetic circuitry includes a second path configured to perform a second operation on the two floating-point numbers based at least in part on the difference is size between the two floating-point numbers. The first path and the second path diverge from each other after receipt of the floating-point numbers in the floating-point arithmetic circuitry and converge on a shared adder that is used for the first operation and the second operation.