Dual-Path LNA Circuit for Harmonic Noise Cancellation

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Solution Overview

Problem

Low-noise amplifier (LNA) circuits suffer from less than ideal linearity due to non-linear transconductance of transistors, which results in noise at the carrier frequency from harmonic noise source signals.

Innovation Solution

The LNA circuit employs two signal paths with different amplifying circuits, each with specific transistor configurations and biasing, where the harmonic noise from one path is partially canceled by the other, achieving improved linearity by adjusting transconductance and drain-to-source voltage differences between PMOS and NMOS devices.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If a single amplifying circuit is used, then the circuit complexity is low, but the linearity is poor due to non-linear transconductance of transistors

Engineering Contradiction:
ImprovelinearityVSAvoidcircuit complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The amplifying circuit is divided into two separate signal paths, each with its own amplifying circuit. The first signal path includes a first amplifying circuit with first PMOS and NMOS devices, while the second signal path includes a second amplifying circuit with second PMOS and NMOS devices. This segmentation allows independent optimization of each path to achieve better overall linearity while managing complexity.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The two signal paths are designed with asymmetric transistor configurations. The transconductance per width of the first PMOS devices is different from the second PMOS devices, and similarly for NMOS devices. This asymmetry enables the harmonic noise from one path to be canceled by the other, improving linearity.

Inventive Principle:
Principle #4Asymmetry

2Reliability

If two signal paths with different transistor configurations are used, then the linearity is improved through harmonic noise cancellation, but the device complexity increases

Engineering Contradiction:
ImprovelinearityVSAvoiddevice complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

Different local configurations are applied to the two signal paths. The first amplifying circuit has specific transconductance characteristics while the second has different characteristics. This local differentiation allows each path to contribute differently to the overall output, enabling harmonic cancellation while maintaining manageable device complexity through targeted design variations.

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

The patent changes key parameters of the transistor devices between the two signal paths. Specifically, the transconductance per width and the voltage difference between drain and source are varied for corresponding devices in different paths. These parameter changes enable the harmonic noise cancellation effect while controlling the overall device complexity.

Inventive Principle:
Principle #35Parameter changes

3Ease of manufacture

If transistors with non-linear transconductance are used, then the manufacturing is easier, but the linearity deteriorates due to harmonic noise at carrier frequency

Engineering Contradiction:
Improveease of manufactureVSAvoidlinearity
Core Design Contradiction:
Ease of manufactureVSReliability

Solution Approach 1:

The patent converts the harmful non-linear transconductance characteristic into a beneficial effect. By designing two signal paths with different non-linear characteristics, the harmonic noise generated by each path's non-linear transistors cancels out in the combined output. This transforms the previously harmful non-linearity into a mechanism for noise cancellation, maintaining ease of manufacture with standard transistors while achieving improved linearity.

Inventive Principle:
Principle #22Blessing in disguise (Convert harm into benefit)

Data Source

PatentUS11303250B2High linearity low noise amplifier
Publication Date: 2022.04.12 SHENZHEN GOODIX TECH CO LTD
  • US11303250B2 patent drawing
  • US11303250B2 patent drawing
  • US11303250B2 patent drawing

AI summary

An amplifier circuit is disclosed. The amplifier circuit includes an input terminal configured to receive an input signal, an output terminal configured to transmit an output signal, and a first signal path including a first amplifying circuit, where the first amplifying circuit is configured to receive the input signal and to transmit a first amplified output to the output terminal, and where the first amplified output includes first amplifier circuit harmonic noise. The amplifier circuit also includes a second signal path including a second amplifying circuit, where the second amplifying circuit receives the input signal and transmits a second amplified output to the output terminal, and where the second amplified output includes second amplifier circuit harmonic noise. The output signal includes the first and second amplified outputs, and the first amplifying circuit harmonic noise is at least partially canceled by the second amplifying circuit harmonic noise in the output signal.