Dual-Path Semiconductor Package Structure for Lower Thermal Resistance
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Solution Overview
Problem
Existing package structures face high production costs and limited thermal dissipation due to complex heat dissipation cover designs and high thermal resistance of package materials, which restrict their flexibility and effectiveness across various chip sizes.
Innovation Solution
A package structure incorporating a lead frame, chip die, thermal conductive adhesive layer, and thermal conductive plate, where the thermal conductive plate is exposed on the top surface and the lead frame on the bottom, creating both upper and lower thermal conduction paths for enhanced heat dissipation, with the thermal conductive plate made of high thermal conductivity materials like copper or aluminum, and the adhesive layer simplifying the manufacturing process.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Temperature
If a heat dissipation cover is used to conduct heat from the chip die, then thermal dissipation is improved, but the production cost increases and flexibility decreases
Solution Approach 1:
The patent extracts the heat dissipation function from the complex heat dissipation cover and relocates it to a simplified structure. The chip die itself is positioned to directly contact the lead frame, which serves as the heat dissipation path, eliminating the need for a separate heat dissipation cover component.
Solution Approach 2:
The lead frame is given dual functionality: it serves both as an electrical connection structure and as a heat dissipation path. By making the lead frame directly contact the chip die, it simultaneously performs electrical bonding and thermal conduction, reducing the need for additional specialized components.
2Temperature
If a heat dissipation cover is used to conduct heat from the chip die, then thermal dissipation is improved, but the device shape becomes complicated
Solution Approach 1:
The patent removes the heat dissipation cover component entirely, extracting its heat dissipation function and integrating it into the lead frame structure. This eliminates the complicated shape requirements and simplifies the overall device geometry.
Solution Approach 2:
The heat dissipation function is merged with the lead frame structure. The lead frame is designed to directly contact the chip die, combining the electrical connection function with the heat dissipation function in a single integrated component, thereby simplifying the device shape.
3Reliability
If package material is used to encapsulate the chip die, then protection is provided, but thermal resistance increases
Solution Approach 1:
The patent segments the thermal management function from the encapsulation function. The lead frame provides the thermal conduction path directly from the chip die, while the package material is used only for encapsulation and protection. This segmentation allows the package material to focus on protection without compromising thermal performance.
Solution Approach 2:
The patent creates a direct thermal conduction path in the vertical dimension by having the chip die directly contact the lead frame. This vertical thermal path bypasses the horizontal path through the package material, effectively reducing thermal resistance while maintaining encapsulation protection.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration significantly improves thermal dissipation efficiency by utilizing high thermal conductivity materials and simplifying the manufacturing process, reducing costs and enhancing flexibility across different package types like QFN, QFP, and BGA.
Implementation Method 1
a thermal conductive adhesive layer, disposed on the chip die at a same elevation level as a part of the lead wires above the chip die; a thermal conductive plate, disposed on the thermal conductive adhesive layer
Implementation Method 2
the lower thermal path passing through the chip die and the lead frame
Data Source
AI summary
A package structure, includes: a lead frame, having a die pad and lead pads around the die pad; a chip die on the die pad, wherein the lead pads are electrically connected with the chip die via lead wires; a thermal conductive adhesive layer on the chip die; a thermal conductive plate on the thermal conductive adhesive layer; and a packaging material, encapsulating the lead frame, the chip die, the thermal conductive plate, and the thermal conductive adhesive layer. The thermal conductive plate is exposed on a top of the package material, and the lead frame is exposed on a bottom surface of the package material. The package structure has an upper thermal conduction path passing through the chip die, the thermal conductive adhesive layer, and the thermal conductive plate; and a lower thermal conduction path passing through the chip die and the lead frame.