Dual-Path PLL Varactor Compensation for Spur Noise Reduction
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Solution Overview
Problem
Dual-path phase-locked loop (PLL) systems in high-frequency communication chips face issues with asymmetrical frequency gain due to varactor capacitance-voltage characteristic drifts, leading to spur noise in phase-locked clocks, which affects signal quality.
Innovation Solution
A frequency generating system with a dual-path PLL architecture that includes a control signal generation unit providing a middle voltage adjusted according to the varactor's electrical characteristics to compensate control signals, ensuring symmetrical up and down signal conversion and reducing spur noise.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Area of stationary object
If a dual-path PLL architecture is used to reduce layout area, then the fabrication cost is reduced, but the varactor capacitance-voltage characteristic drifts causing asymmetrical frequency gain and spur noise
Solution Approach 1:
The patent introduces a feedback mechanism where the control signal generation unit monitors the electrical characteristics of the varactor and dynamically adjusts the middle voltage level accordingly. This feedback loop compensates for capacitance-voltage characteristic drifts, maintaining symmetrical frequency gain for up and down signals while preserving the compact dual-path architecture
Solution Approach 2:
The patent dynamically changes the voltage parameter (middle voltage level) based on the detected electrical characteristics of the varactor. By adjusting this parameter in response to drift conditions, the system maintains consistent frequency gain symmetry without requiring a larger layout area
2Adaptability or versatility
If the varactor capacitance-voltage characteristic is used for frequency control, then the VCO can be controlled, but the characteristic drifts with process variation and temperature change causing signal quality degradation
Solution Approach 1:
The control signal generation unit continuously monitors the varactor's electrical characteristics and uses this feedback information to adjust the middle voltage level, compensating for drifts caused by process variation and temperature changes, thereby maintaining signal quality
Solution Approach 2:
The system performs preliminary detection of the varactor's electrical characteristics and proactively adjusts the middle voltage level before significant drift affects signal quality. This preventive adjustment maintains symmetrical frequency gain and reduces spur noise
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The system effectively reduces spur noise in phase-locked clocks, enhancing signal quality by maintaining consistent frequency gain across up and down signals despite process variations and temperature changes.
Implementation Method 1
the capacitance-voltage characteristic curve of a varactor in a VCO of a dual-path PLL may drift
Data Source
AI summary
A frequency generating system including a phase-locked loop (PLL) and a control signal generation unit is provided. The PLL outputs a phase-locked clock and controls a voltage-controlled oscillator (VCO) therein by using a dual-path architecture. The VCO includes a varactor. The control signal generation unit is coupled to the PLL and disposed in one of the dual paths. The control signal generation unit provides an up voltage, a down voltage, or a middle voltage as a control signal to control the VCO according to an up signal and a down signal of the PLL. The control signal generation unit provides the middle voltage in response to an electrical characteristic of the varactor to compensate the control signal.