Dual-Path Power Gating Structure for Stable Data Retention

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Solution Overview

Problem

Conventional power gating structures in semiconductor devices face challenges in maintaining stable data retention and reducing power consumption due to ground bouncing and leakage currents, especially when transitioning between operational modes, and struggle with synchronizing control signals to prevent data loss.

Innovation Solution

A power gating structure that includes multiple paths controlled by distinct control signals to manage electrical connections between power supply terminals and virtual power supply nodes, allowing for stable operation in active, data retention, and power-down modes, preventing ground bouncing and leakage currents by isolating or coupling these nodes based on specific signal logic levels.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Loss of energy

If MTCMOS transistors are used to reduce leakage current, then power consumption is reduced, but ground bouncing occurs and data retention fails

Engineering Contradiction:
Improveleakage currentVSAvoiddata retention
Core Design Contradiction:
Loss of energyVSReliability

Solution Approach 1:

The invention divides the single power supply path into two separate paths: a first path for the power supply voltage and a second path for the ground voltage. This segmentation allows independent control of each path, preventing ground bouncing from affecting the power supply stability and enabling reliable data retention while maintaining low leakage current through MTCMOS transistors.

Inventive Principle:
Principle #1Segmentation

2Reliability

If control signals are synchronized to switch power gating, then data retention is maintained, but control complexity increases and timing synchronization becomes difficult

Engineering Contradiction:
Improvedata retentionVSAvoidcontrol signal synchronization
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The invention introduces a second control signal that operates in advance or independently of the first control signal to adjust the ground voltage before or during the switching of the power supply voltage. This preliminary action on the ground path prevents ground bouncing from occurring, allowing the first control signal to switch power gating without requiring precise synchronization, thereby reducing control complexity.

Inventive Principle:
Principle #10Preliminary action

3Use of energy by stationary object

If power supply is cut to inactive blocks, then power consumption is reduced, but data loss occurs during mode transitions

Engineering Contradiction:
Improvepower consumptionVSAvoiddata loss
Core Design Contradiction:
Use of energy by stationary objectVSLoss of information

Solution Approach 1:

The invention uses the second control signal and the associated ground voltage adjustment mechanism as an intermediary between the power supply cutting action and data retention requirements. By independently adjusting the ground voltage through the second path before or during power supply cutoff, the intermediary action prevents ground bouncing that would cause data loss, enabling safe power consumption reduction without information loss.

Inventive Principle:
Principle #24Intermediary (Mediator)

Data Source

PatentUS7605636B2Power gating structure, semiconductor including the same and method of controlling a power gating
Publication Date: 2009.10.20 SAMSUNG ELECTRONICS CO LTD
  • US7605636B2 patent drawing
  • US7605636B2 patent drawing
  • US7605636B2 patent drawing

AI summary

A power gating structure controls a connection between a power supply terminal and a virtual power supply node so as to operate a logic circuit in a plurality of operation modes. The power gating structure includes a first path and a second path. In an active mode, the first path electrically couples the power supply terminal with the virtual power supply node in response to a first control signal. In a data retention mode, the second path electrically couples the power supply terminal with the virtual power supply node in response to the first control signal and a second control signal with a predetermined voltage level difference. In a power-down mode, both the first path and the second path electrically isolate the power supply terminal from the virtual power supply node in response to the first control signal and the second control signal.