Dual-Path Ring PLL Frequency Control for Low Phase Jitter

Resolve Bottlenecks,
Find Innovative SolutionsGenerate Solutions

Solution Overview

Problem

Purely digital PLLs have high phase jitter due to quantized phase error correction, while purely analog PLLs have complex correction paths and large footprints, and hybrid LC tank PLLs are costly and large, making them unsuitable for all applications.

Innovation Solution

A hybrid ring PLL circuit with a digital path and an analog path that simultaneously control the frequency of a ring oscillator, using a digital phase detector and a linear phase detector to provide proportional and discrete frequency adjustments, reducing phase jitter while maintaining a smaller footprint.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Device complexity

If a purely digital PLL is used, then the device complexity and footprint are reduced, but the phase jitter increases due to quantized phase error correction

Engineering Contradiction:

Improvecircuit complexityVSAvoidphase jitter

Core Design Contradiction:

Device complexityVSReliability

Solution Approach 1:

The patent combines digital and analog correction paths in a hybrid PLL architecture. The digital path provides coarse frequency adjustment with quantized correction, while the analog path provides fine continuous correction. Both paths work simultaneously to control the ring oscillator, merging the advantages of digital simplicity with analog precision to reduce phase jitter while maintaining reasonable device complexity.

Inventive Principle:

Principle #5Merging (Combining)

Solution Approach 2:

The correction function is segmented into two separate paths: a digital correction path for coarse adjustment and an analog correction path for fine adjustment. This segmentation allows each path to operate in its optimal domain, with the digital path handling large frequency deviations and the analog path handling small precision adjustments, thereby reducing overall phase jitter.

Inventive Principle:

Principle #1Segmentation

2Reliability

If a purely analog PLL is used, then the phase jitter is reduced due to continuous correction, but the device complexity and footprint increase due to complex correction paths

Engineering Contradiction:

Improvephase jitterVSAvoidcircuit complexity

Core Design Contradiction:

ReliabilityVSDevice complexity

Solution Approach 1:

Inventive Principle:

Principle #1Segmentation

Solution Approach 2:

Instead of using a fully analog correction path, the patent applies partial analog action through a dedicated analog correction path that works in conjunction with the digital path. The analog path provides only the necessary fine correction component, avoiding the full complexity of a purely analog PLL while still achieving low phase jitter performance.

Inventive Principle:

Principle #16Partial or excessive action

3Reliability

If a hybrid LC tank PLL is used, then the phase jitter is reduced, but the cost and footprint increase

Engineering Contradiction:

Improvephase jitterVSAvoidfootprint

Core Design Contradiction:

ReliabilityVSArea of stationary object

Solution Approach 1:

The patent substitutes the traditional LC tank oscillator with a ring oscillator implementation. The ring oscillator uses digital logic gates arranged in a feedback loop, replacing the analog LC resonant circuit. This substitution maintains the hybrid digital-analog correction architecture for low phase jitter while significantly reducing the area footprint and eliminating the need for expensive LC components.

Inventive Principle:

Principle #28Mechanics substitution (Replace mechanical system)

Data Source

PatentUS10063243B2Digital phase locked loop for low jitter applications

Publication Date: 2018.08.28 INTERNATIONAL BUSINESS MACHINE CORPORATION

AI summary

A phase locked loop circuit is disclosed. The phase locked loop circuit includes a ring oscillator. The phase locked loop circuit also includes a digital path including a digital phase detector. The phase locked loop circuit further includes an analog path including a linear phase detector. Additionally, the phase locked loop circuit includes a feedback path connecting an output of the ring oscillator to an input of the digital path and an input of the analog path. The digital path and the analog path are parallel paths. The digital path provides a digital tuning signal the ring oscillator that digitally controls a frequency of the ring oscillator. The analog path provides an analog tuning signal the ring oscillator that continuously controls the frequency of the ring oscillator.