Dual-Path Signal Shaping for Metastable Error Compensation
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Solution Overview
Problem
Digital data signals often produce metastable errors due to voltages other than known data state voltages, leading to errors and instability in systems like analog to digital converters, which can result in glitches and incorrect outputs.
Innovation Solution
A circuit with two data paths is used to produce delayed analog signals, one with an analog delay and the other with a digital delay and digital to analog conversion, to adjust subsequent analog output values and compensate for metastable errors, reducing glitches without delaying correction signals.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If digital data signals are used directly in analog to digital converters, then the conversion process is simple and fast, but metastable errors occur causing glitches and incorrect outputs
Solution Approach 1:
The patent applies preliminary action by detecting metastable conditions in the digital signal before the analog-to-digital conversion is completed. The system proactively identifies when a digital signal is in a metastable state (between logic 0 and 1) and takes corrective action by holding or resetting the signal before it causes conversion errors, thus preventing rather than reacting to the problem after it occurs.
Solution Approach 2:
The patent implements feedback by continuously monitoring the digital signal state during conversion and using this information to control the conversion process. When a metastable condition is detected through feedback from the signal monitoring circuitry, the system adjusts the conversion timing or resets the latch, creating a closed-loop control system that maintains output accuracy despite high-speed operation.
2Reliability
If metastable errors are corrected by delaying correction signals, then output accuracy is improved, but the correction process introduces additional delay
Solution Approach 1:
The patent applies preliminary action by detecting and flagging metastable conditions immediately when they occur, rather than waiting for the conversion to complete and then correcting the error. The system prepares correction signals in advance during the conversion process itself, so that when a metastable error is identified, the correction can be applied without pausing or delaying the overall conversion operation.
Solution Approach 2:
The patent maintains continuity of useful action by ensuring that the correction process does not interrupt the conversion flow. Multiple latches operate in a pipelined fashion where while one latch is being corrected for metastable errors, other latches continue processing conversions. The correction signals are generated and applied in parallel with ongoing conversions, eliminating idle time and maintaining continuous productive operation.
Data Source
AI summary
A circuit that receives a series a digital signal values from a digital circuit output where the output has a propensity to produce digital values with a metastable error. The circuit produces an analog output signal having values over time corresponding to the digital signal values. The circuit includes two data paths that receive the digital signal values and produce a delayed analog signal. One data path includes an analog delay and the other data path includes a digital delay and a digital to analog converter. The circuit uses the output of the two data paths to adjust a later output analog signal value that is produced by the analog circuit output subsequent to a former output analog signal value produced by the analog circuit output that corresponds to a digital signal value of the series with a metastable error to compensate for the metastable error in the output signal.