Dual-PD Pixel Layout With Split Dies for Crosstalk-Free Scaling

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Solution Overview

Problem

The challenge in scaling down image sensors with dual-photodetector (PD) layouts is the consumption of significant area by pixel transistors and implant isolation regions, which degrades performance due to optical crosstalk and limits further miniaturization.

Innovation Solution

The implementation of a dual-PD pixel layout spanning a first and second integrated circuit (IC) die, where a deep trench isolation (DTI) structure completely separates photodetectors, and pixel transistors are split between the two dies, allowing for larger photodetectors and reduced optical crosstalk.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If pixel transistors and implant isolation regions are used in dual-PD layout, then photodetector functionality is achieved, but area consumption increases and optical crosstalk occurs

Engineering Contradiction:
Improveoptical crosstalk preventionVSAvoidpixel area
Core Design Contradiction:
ReliabilityVSArea of stationary object

Solution Approach 1:

The pixel is divided into two separate IC dies, with photodetectors on the first die and transistors on the second die. This segmentation eliminates the need for implant isolation regions between photodetectors and transistors, reducing area consumption and preventing optical crosstalk while maintaining full photodetector functionality.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The transistor components are extracted from the photodetector die and placed on a separate IC die. This extraction removes the harmful implant isolation regions from the photodetector area, eliminating optical crosstalk and reducing the area occupied by isolation structures while preserving all necessary photodetector functions.

Inventive Principle:
Principle #2Taking out (Extraction)

2Reliability

If implant isolation regions are used to separate photodetectors, then optical crosstalk is reduced, but area consumption increases and scaling is limited

Engineering Contradiction:
Improveoptical crosstalk preventionVSAvoidscaling capability
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

By segmenting the pixel into two IC dies, the patent eliminates the need for implant isolation regions entirely. The physical separation between photodetectors and transistors achieves complete optical isolation without consuming area, enabling continuous scaling down of pixel dimensions and improving manufacturing productivity.

Inventive Principle:
Principle #1Segmentation

3Reliability

If photodetector area is increased to improve full well capacity, then performance increases, but overall pixel area consumption increases

Engineering Contradiction:
Improvefull well capacityVSAvoidpixel area
Core Design Contradiction:
ReliabilityVSArea of stationary object

Solution Approach 1:

The segmentation of photodetectors and transistors onto separate IC dies removes the area consumed by implant isolation regions and transistor overhead from the photodetector area. This allows photodetectors to be enlarged to increase full well capacity without proportionally increasing the overall pixel area, as the isolation and transistor components occupy space on the second die.

Inventive Principle:
Principle #1Segmentation

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This configuration enhances performance by increasing full well capacity and enabling further scaling down of image sensors while preventing optical crosstalk, thereby improving accuracy and speed of phase detection autofocus.

Implementation Method 1

a deep trench isolation (DTI) structure completely separates photodetectors, and pixel transistors are split between the two dies, allowing for larger photodetectors and reduced optical crosstalk

Methodology Applied
Scientific EffectOptical crosstalk prevention:

Implementation Method 2

a pixel with a dual-photodetector (PD) layout and that spans a first integrated circuit (IC) die and a second IC die

Methodology Applied
Scientific EffectPhotoelectric effect: Photoelectric Effect

Data Source

PatentUS20240290810A1Pixel with dual-PD layout
Publication Date: 2024.08.29 TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD
  • US20240290810A1 patent drawing
  • US20240290810A1 patent drawing
  • US20240290810A1 patent drawing

AI summary

Various embodiments of the present disclosure are directed towards an image sensor comprising a pixel with a dual-PD layout for enhanced scaling down. The pixel spans a first integrated circuit (IC) die and a second IC die stacked with the first IC die. The pixel comprises a plurality of photodetectors in the first IC die, and further comprises a plurality of pixel transistors split amongst the first IC die and the second IC die. The plurality of photodetectors are grouped into one or more pairs, each having the dual-PD layout. A DTI structure completely and individually surrounds the plurality of photodetectors, and further extends completely through a substrate within which the plurality of photodetectors are arranged. As such, the DTI structure completely separates the plurality of photodetectors from each other.