Dual-Polarized Phased Antenna Array With Reconstituted Wafer Integration

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Solution Overview

Problem

Conventional phased antenna array devices suffer from high losses, complexity in assembly, costly manufacturing, and limitations in size and frequency range due to physical constraints and architectural limitations of silicon-integrated solutions.

Innovation Solution

The proposed solution employs IC packaging technologies, specifically reconstituted wafer techniques, to manufacture phased antenna array devices, allowing for dual polarized operation, reduced RF losses, and integration of multiple silicon dies without the need for standard IC packaging, thereby addressing size and frequency limitations.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Manufacturing precision

If silicon-integrated phased antenna arrays are manufactured using traditional IC technologies, then manufacturing precision and integration are improved, but array size is limited to a few square millimeters due to die size constraints

Engineering Contradiction:
Improveintegration precisionVSAvoidarray size
Core Design Contradiction:
Manufacturing precisionVSArea of moving object

Solution Approach 1:

The patent divides the antenna array into multiple identical modules that can be produced separately and then assembled together. Each module contains a subset of antenna elements and can be manufactured on smaller silicon dies, overcoming the die size limitation while maintaining manufacturing precision through standardized module fabrication

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent embeds multiple silicon dies containing antenna elements into a polymer-based package substrate. The silicon dies are nested within the larger package structure, allowing the overall array size to exceed the limitations of individual silicon dies while maintaining precise integration through controlled embedding processes

Inventive Principle:
Principle #7Nested doll (Nesting)

2Area of moving object

If multiple silicon dies are attached to an IC package using flip-chip technology, then array size is increased, but manufacturing complexity and cost increase significantly

Engineering Contradiction:
Improvearray sizeVSAvoidassembly complexity
Core Design Contradiction:
Area of moving objectVSDevice complexity

Solution Approach 1:

The patent combines multiple silicon dies containing antenna elements with the polymer-based package substrate in a single integrated structure. The dies are embedded directly into the substrate during manufacturing, eliminating the need for separate flip-chip attachment steps and reducing assembly complexity while achieving larger array sizes

Inventive Principle:
Principle #5Merging (Combining)

3Ease of manufacture

If standard IC packaging is used for phased antenna arrays, then manufacturing processes are simplified, but array size and frequency range are limited by package dimensions

Engineering Contradiction:
Improvemanufacturing process simplicityVSAvoidarray size
Core Design Contradiction:
Ease of manufactureVSArea of moving object

Solution Approach 1:

The patent uses a composite structure combining silicon dies with a polymer-based package substrate. This composite approach allows the array to exceed the size limitations of standard IC packages while maintaining ease of manufacture through established semiconductor fabrication processes for the silicon portions and flexible packaging techniques for the polymer substrate

Inventive Principle:
Principle #40Composite materials

4Ease of operation

If corporate divider/combiner circuits are used to distribute RF energy, then beamforming control is improved, but RF losses increase due to circuit limitations

Engineering Contradiction:
Improvebeamforming controlVSAvoidRF loss
Core Design Contradiction:
Ease of operationVSLoss of energy

Solution Approach 1:

The patent extracts the corporate divider/combiner circuits from the silicon die and implements them as external feed networks on the polymer substrate or as integrated feed elements. This separation removes the lossy circuitry from the high-frequency silicon environment while maintaining beamforming control capabilities through external network design

Inventive Principle:
Principle #2Taking out (Extraction)

Data Source

PatentEP3766128B1Phased antenna array device
Publication Date: 2025.02.19 THE TECHNOLOGY PARTNERSHIP PLC
  • EP3766128B1 patent drawingFigure 1
  • EP3766128B1 patent drawingFigure 2
  • EP3766128B1 patent drawingFigure 3

AI summary

A phased antenna array device comprises at least one input port for interfacing receive and transmit RF signals to/from an antenna array. A feeding line is provided to carry RF signals of two orthogonal polarizations from the input port P1, and at least one antenna feed element with an aperture or cross section having an order of symmetry C4 and supporting RF signals of two orthogonal polarizations is provided. At least one first substrate contains a plurality of antenna elements integrated into the substrate, with each antenna element capable of operating at two orthogonal polarizations. A plurality of phase shifters are connected to corresponding antenna elements, each phase shifter operating at two orthogonal polarizations, the output port of each phase shifter being connected to a short circuit.