Dual Port Link List Header and Data Credit Management
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Solution Overview
Problem
Current data transfer methods across asynchronous boundaries, particularly in processor-based applications, lack flexibility in allocating data blocks and managing credits, leading to inefficiencies in high-bandwidth packet-based transfers across systems with different clocks.
Innovation Solution
A dual port link list header and data credit management structure utilizing shared multi-port RAM buffers, allowing the application and transaction layers to access and manage data in 16-byte boundaries, decoupling data credits from header credits, and using free lists to allocate memory dynamically for efficient data transfers across asynchronous boundaries.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If fixed header and data structures with standard asynchronous handshake methods are used, then compatibility with existing asynchronous protocols is maintained, but flexibility in allocating data blocks and managing credits is lost
Solution Approach 1:
The patent segments the data transfer management into separate components: a header structure containing control information and a data structure containing actual data. The header includes fields for splitting information, data offset, and length, allowing flexible allocation. The data structure is divided into multiple 128-bit data blocks that can be independently managed. This segmentation enables flexible data block allocation while maintaining manageable complexity through structured organization.
Solution Approach 2:
The patent implements dynamic credit management where the receiver can request different numbers of data blocks (N integers) based on actual needs rather than using fixed predetermined amounts. The header contains dynamic fields that adjust data offset and length according to the specific transfer requirements. This dynamic approach provides adaptability while the structured header format keeps the complexity organized and manageable.
2Adaptability or versatility
If data credits are coupled with header credits in fixed structures, then protocol simplicity is maintained, but flexibility to allocate N integers of data blocks dynamically is lost
Solution Approach 1:
The patent separates data credits from header credits by using independent data structures. The header structure manages control information separately from the data structure that manages actual data blocks. This segmentation allows data credits to be allocated dynamically based on N integers without being constrained by fixed header credit structures, while the clear separation maintains protocol simplicity through organized management of separate credit types.
Solution Approach 2:
The patent changes the parameters of data block allocation from fixed to variable. The header contains fields that can be dynamically adjusted to specify different numbers of data blocks (N integers), data offsets, and lengths. This parameter flexibility allows dynamic allocation of data credits while the structured format with defined fields keeps the protocol operations straightforward and manageable.
3Productivity
If shared multi-port RAM buffers are used for dual port access, then data transfer bandwidth is increased, but memory allocation management complexity increases
Solution Approach 1:
The patent segments the shared RAM buffer management into separate free lists: a header free list for managing header entries and a data free list for managing data blocks. Each list independently tracks available memory resources, simplifying the allocation management. The initiator can independently allocate from these segmented lists without complex coordination, enabling high bandwidth transfers through parallel access while keeping management complexity low through independent list management.
Solution Approach 2:
The patent implements feedback mechanisms where the receiver provides feedback about available data blocks and the initiator adjusts allocation accordingly. The free lists provide continuous feedback on memory availability, allowing dynamic allocation decisions. This feedback approach enables efficient use of shared RAM buffers for high bandwidth transfers while the automated feedback loops simplify management complexity by handling allocation decisions automatically based on real-time availability.
4Productivity
If asynchronous packet based transfers are implemented, then data transfer efficiency across different clocks is improved, but reliability of data transfer management increases complexity
Solution Approach 1:
The patent performs preliminary actions by having the initiator check for available data blocks and allocate memory resources before actual data transfer begins. The header structure is prepared in advance with all necessary control information including splitting information, offsets, and lengths. This preliminary preparation ensures that when asynchronous transfer occurs, all management tasks are already organized, maintaining reliability while enabling efficient cross-clock data transfer through pre-established protocols.
Solution Approach 2:
The patent uses feedback mechanisms where the receiver acknowledges received data blocks and the initiator adjusts subsequent allocations based on this feedback. The free lists continuously update based on allocation status, providing feedback on memory availability. This feedback loop ensures reliable data transfer management across asynchronous boundaries by allowing both sides to coordinate based on real-time status, maintaining reliability while preserving transfer efficiency.
Data Source
AI summary
An asynchronous data transfer interface is provided across a boundary that allows high bandwidth data transfers which are packet based as defined by PCI_Express architecture, and has general utility in processor-based applications like servers, desktop applications, and mobile applications. A shared set of multi-port RAM buffers allow both an application layer AL and a transaction layer TL access to a communication protocol layer in a defined process that allows both the application layer AL and the transaction layer TL to read and manage the buffers in a 16 byte boundary in a manner that allows a data credit to be decoupled from a header credit.