Dual-Port Memory for AES Round Key Storage

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Solution Overview

Problem

Traditional implementations of AES-GCM struggle with efficiently managing and accessing round keys for multiple encryption processes running concurrently, leading to bottlenecks and reduced system performance.

Innovation Solution

The use of dual-port memory devices for storing and providing access to round keys of the AES algorithm, allowing for simultaneous writing of new key schedules and reading of existing round keys, and employing a structured storage approach to enhance access efficiency.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Speed

If traditional memory devices are used for storing round keys, then the system can maintain simple memory architecture, but the access speed and efficiency of encryption operations are limited

Engineering Contradiction:
Improveencryption operation speedVSAvoidmemory device complexity
Core Design Contradiction:
SpeedVSDevice complexity

Solution Approach 1:

The memory system is segmented into multiple memory devices, each dedicated to storing round keys for specific encryption streams. This segmentation allows parallel access to different round key sets without interference, improving encryption operation speed while keeping each individual memory device relatively simple in structure.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent introduces a new dimension to memory access by using dual-port memory devices that can simultaneously perform read and write operations on different ports. This dimensional change in memory access capability enables concurrent key scheduling and encryption operations, significantly improving throughput without requiring a complete redesign of the memory architecture.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

2Productivity

If multiple encryption processes run concurrently, then the system can improve productivity, but managing and accessing round keys becomes more complex and slower

Engineering Contradiction:
Improveencryption throughputVSAvoidround key access latency
Core Design Contradiction:
ProductivityVSLoss of time

Solution Approach 1:

The system segments round key storage across multiple memory devices, with each memory device dedicated to specific encryption streams. This allows concurrent encryption processes to access round keys simultaneously without waiting for each other, improving productivity while eliminating the latency bottleneck of sequential key access.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The key scheduling process performs preliminary action by pre-generating and storing multiple round key sets in advance within the memory devices before encryption operations begin. This allows the encryption processes to start immediately without waiting for key generation, reducing time loss during concurrent operations.

Inventive Principle:
Principle #10Preliminary action

3Adaptability or versatility

If a single memory device is used for all round keys, then the device complexity is low, but the flexibility to manage multiple encryption streams is reduced

Engineering Contradiction:
Improveflexibility in managing encryption streamsVSAvoidmemory device structure
Core Design Contradiction:
Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The dual-port memory device serves multiple functions: it can simultaneously perform read operations for encryption and write operations for key scheduling, and it can be configured to support multiple encryption streams through its dual ports. This multi-functionality provides the flexibility to manage multiple encryption streams while avoiding the need for entirely separate memory devices for each function.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Data Source

PatentUS20250190591A1Storing and providing access to round keys of advanced encryption standard using dual port memory devices
Publication Date: 2025.06.12 MICROCHIP TECHNOLOGY INC
  • US20250190591A1 patent drawing
  • US20250190591A1 patent drawing
  • US20250190591A1 patent drawing

AI summary

A system includes one or more processing units adapted to generate, using a first encryption key, a first set of round keys for rounds of an advanced encryption standard (AES) algorithm; generate, using a second encryption key, a second set of round keys; and determine different addresses, of a plurality of memory devices, for the first and second sets of round keys; and store the first and second sets of round keys in the different addresses, wherein the first round key is stored in a memory device, of the plurality of memory devices, using a first port of the memory device, and wherein the memory device is a dual port memory device that includes the first port and a second port.