Dual-Port Non-Volatile Memory Interface for Latency Reduction

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Solution Overview

Problem

Existing interfaces and protocols for volatile memory are not suited for the higher speed and different latencies of non-volatile memory technologies, leading to inefficiencies in data access and operation.

Innovation Solution

The implementation of a dual-port system for non-volatile memory die, where one port receives command and address information and another port transfers data, allowing for simultaneous data transfer and command processing, thereby optimizing data operations and reducing latency.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Device complexity

If a single port is used for both command/address information and data transfer, then device complexity is reduced, but data transfer rate and operation speed deteriorate

Engineering Contradiction:
Improveinterface structureVSAvoiddata transfer rate
Core Design Contradiction:
Device complexityVSProductivity

Solution Approach 1:

The interface is segmented into two separate ports: a first port dedicated to receiving command and address information, and a second port dedicated to data transfer. This segmentation allows simultaneous operation of command processing and data transfer, resolving the contradiction between interface simplicity and data transfer speed by organizing functionality into distinct channels.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The interface architecture transitions from a single-dimensional shared channel to a two-dimensional parallel channel structure. By adding the temporal dimension of simultaneous operation across separate ports, the system achieves higher productivity without proportionally increasing complexity, as each port operates independently in its designated function.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

2Ease of operation

If volatile memory interface protocols are used for non-volatile memory, then ease of operation is maintained, but reliability and performance deteriorate due to latency and persistence differences

Engineering Contradiction:
Improveinterface usabilityVSAvoiddata operation reliability
Core Design Contradiction:
Ease of operationVSReliability

Solution Approach 1:

The interface implementation applies local quality by configuring the first port to accept only command and address information while the second port handles only data transfer. This localized functional assignment optimizes each port for its specific purpose, ensuring reliable operation for non-volatile memory's unique latency and persistence characteristics while maintaining operational simplicity through standardized protocols.

Inventive Principle:
Principle #3Local quality

3Productivity

If separate ports are used for command/address information and data transfer, then data transfer rate improves, but device complexity increases

Engineering Contradiction:
Improvedata operation speedVSAvoidport configuration
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The interface is segmented into two separate ports: a first port dedicated to receiving command and address information, and a second port dedicated to data transfer. This segmentation allows simultaneous operation of command processing and data transfer, resolving the contradiction between interface simplicity and data transfer speed by organizing functionality into distinct channels.

Inventive Principle:
Principle #1Segmentation

Data Source

PatentUS10528286B2Interface for non-volatile memory
Publication Date: 2020.01.07 SANDISK TECHNOLOGIES LLC
  • US10528286B2 patent drawing
  • US10528286B2 patent drawing
  • US10528286B2 patent drawing

AI summary

Apparatuses, systems, methods, and computer program products are disclosed for accessing non-volatile memory. An apparatus includes one or more memory die. A memory die includes an array of non-volatile memory cells, a set of ports, and an on-die controller. A set of ports includes a first port and a second port. A first port includes a first plurality of electrical contacts and a second port includes a second plurality of electrical contacts. An on-die controller communicates via a set of ports to receive command and address information and to transfer data for data operations on an array of non-volatile memory cells. An on-die controller uses a first port to receive command and address information and to transfer data. An on-die controller uses a second port to transfer data but not to receive command and address information.