Dual-Port Slave Latch Flip-Flop for External Data Retention Updates
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Solution Overview
Problem
Non-volatile logic circuits face challenges in updating sequential elements like flip-flops without significantly slowing their operation, especially when requiring external updates from non-volatile memory.
Innovation Solution
A flip-flop circuit design incorporating a 2-input multiplexer, master latch, transfer gate, and dual-port slave latch with a tri-state inverter, allowing for external data insertion without affecting the critical timing path, thus maintaining negligible performance change.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If non-volatile logic circuits are implemented to allow updating of sequential elements from external sources, then data retention capability is improved, but the operation speed of sequential elements is significantly slowed
Solution Approach 1:
The slave latch is divided into two independent ports: a first port for receiving data from the sequential element during normal operation, and a second port for receiving data from external non-volatile memory sources. This segmentation allows each port to operate independently without interfering with the critical timing path of the other, thus maintaining high operation speed while enabling data retention capability.
Solution Approach 2:
A tri-state inverter is introduced as an intermediary component in the second port of the slave latch. This tri-state inverter acts as a mediator that can selectively connect or disconnect the external data source from the latch, allowing external data to be loaded without affecting the timing-critical path used during normal sequential element operation. The tri-state capability enables the intermediary to isolate the external interface from the internal timing path.
2Adaptability or versatility
If a dual-port slave latch is used to enable external data insertion, then adaptability is improved, but device complexity increases
Solution Approach 1:
The slave latch is designed with dual-port functionality where the same latch structure serves multiple purposes: the first port handles normal sequential element data transfer, while the second port handles external non-volatile memory data input. This multi-functionality increases adaptability without requiring separate latch structures for each function, thereby limiting the increase in overall device complexity.
Solution Approach 2:
The tri-state inverter in the second port is controlled by a slave control signal that automatically manages the switching between external data input and internal latch storage. The circuit self-regulates the data flow based on control signals, reducing the need for additional complex control logic and minimizing the increase in device complexity while maintaining high adaptability.
Data Source
AI summary
In an embodiment of the invention, a flip-flop circuit contains a 2-input multiplexer, a master latch, a transfer gate and a slave latch. The scan enable control signals SE and SEN of the multiplexer determine whether data or scan data is input to the master latch. The clock signals CLK and CLKN and retention control signals RET and RETN determine when the master latch is latched. The slave latch is configured to receive the output of the master latch, a second data bit D2, the clock signals CLK and CLN, the retain control signals RET and RETN, the slave control signals SS and SSN. The signals CLK, CLKN, RET, RETN, SS and SSN determine whether the output of the master latch or the second data bit D2 is latched in the slave latch. Control signals RET and RETN determine when data is stored in the slave latch during retention mode.