Dual Power Supply Memory Array Dynamic Bitline Pre-charge
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Solution Overview
Problem
Dual power supply memory arrays face stability failures due to power supply noise causing the first supply voltage for bitline pre-charge operations to exceed the second supply voltage, leading to increased power and area consumption in existing solutions.
Innovation Solution
A dual power supply memory array with a voltage comparator and control circuit that dynamically selects the lower of two supply voltages for bitline pre-charge operations, ensuring complementary bitlines are pre-charged to either the first or second supply voltage based on a voltage difference signal, thereby avoiding stability failures without significant power and area penalties.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Use of energy by moving object
If the first supply voltage (Vdd) is used for bitline pre-charge operations to reduce power consumption, then power efficiency is improved, but stability fails occur when Vdd exceeds Vcs due to power supply noise
Solution Approach 1:
The patent implements dynamic voltage selection for bitline pre-charge operations by using a control circuit that monitors the relationship between Vdd and Vcs and automatically selects the appropriate voltage source. This dynamic adaptation allows the system to switch between using Vdd (for power efficiency) and Vcs (for stability) based on real-time voltage conditions, resolving the contradiction between power consumption and memory stability
Solution Approach 2:
The patent employs a control circuit that continuously monitors the voltage levels of Vdd and Vcs and uses this feedback information to determine which voltage source should be used for bitline pre-charge operations. The control circuit compares the two voltages and selects the lower one, ensuring that pre-charge voltage never exceeds cell supply voltage, thus preventing stability fails while optimizing power consumption
2Reliability
If the second power supply rail (Vcs) is increased in power to prevent Vdd from exceeding it, then stability is improved, but power and area consumption increase
Solution Approach 1:
Rather than statically increasing Vcs power capacity, the patent implements dynamic voltage selection that adapts to real-time voltage conditions. The control circuit monitors Vdd and Vcs levels and selectively connects the bitline pre-charge circuitry to the appropriate voltage source, allowing the system to maintain stability without permanently over-provisioning the Vcs rail power capacity
Solution Approach 2:
The control circuit acts as an intermediary between the two power supply rails and the bitline pre-charge operations. It mediates the voltage selection process by comparing Vdd and Vcs levels and routing the pre-charge operation to the appropriate voltage source, thereby preventing stability fails without requiring increased power capacity in either rail
3Reliability
If decoupling capacitors are added to minimize power supply noise, then stability is improved, but area consumption increases
Solution Approach 1:
The control circuit serves as an active intermediary that compensates for power supply noise effects through intelligent voltage selection. By monitoring and comparing voltage levels in real-time, the control circuit prevents instability caused by noise-induced voltage fluctuations, eliminating the need for additional decoupling capacitors and their associated area overhead
Solution Approach 2:
The patent changes the operational parameter from passive noise filtering (using capacitors) to active voltage selection (using control circuitry). By dynamically adjusting which voltage source is used based on real-time conditions, the system achieves noise immunity and stability without relying on passive filtering components that consume area
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution effectively prevents stability failures by dynamically selecting the lower supply voltage for bitline pre-charge operations, reducing power and area consumption while maintaining memory array stability.
Implementation Method 1
a voltage comparator to compare the first supply voltage to the second supply voltage and output a voltage difference signal
Implementation Method 2
a control circuit to dynamically select the lower of the two supply voltages based on the voltage difference signal
Data Source
AI summary
Disclosed is a memory array in which the lower of two supply voltages from two power supplies is dynamically selected for bitline pre-charge operations. In the memory array, a voltage comparator compares the first supply voltage on a first power supply rail to a second supply voltage on a second power supply rail and outputs a voltage difference signal. If the voltage difference signal has a first value indicating that the first supply voltage is equal to or less than the second supply voltage, than a control circuit ensures that the complementary bitlines connected to a memory cell are pre-charged to the first supply voltage. If the voltage difference signal has a second value indicating that the first supply voltage is greater than the second supply voltage, then the control circuit ensures that the complementary bitlines are pre-charged to the second supply voltage. Also disclosed is an associated method.