Dual-Processor Boot Sequence for Fast Startup

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Solution Overview

Problem

Dual-processor electronic devices face challenges in achieving quick startup times due to the limitations of single-processor boot-up processes, which hinder responsive performance in communication devices.

Innovation Solution

The second processor assists the first processor by performing image file copying and decompression tasks, allowing the first processor to initialize peripheral equipment after receiving a ready message, thereby reducing startup time through a method involving CPU initialization, calibration of DDR, and delayed startup based on decompressed image file receipt.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Loss of time

If a single processor is used for boot-up, then the device structure is simple, but the startup time is long

Engineering Contradiction:
Improvestartup timeVSAvoidprocessor configuration
Core Design Contradiction:
Loss of timeVSDevice complexity

Solution Approach 1:

The patent divides the boot-up process into distinct segments handled by different processors: the first processor performs initialization and calibration, while the second processor handles image file copying and decompression. This segmentation allows parallel execution of tasks that were previously sequential, reducing overall startup time without requiring a single complex processor.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The second processor performs preliminary actions by copying and decompressing image files to the DDR memory before the first processor completes its initialization. This preliminary preparation of system files enables the first processor to boot up faster since it doesn't need to perform time-consuming file operations during its startup sequence.

Inventive Principle:
Principle #10Preliminary action

2Speed

If the first processor performs all boot-up tasks alone, then the device structure is simple, but the startup speed is slow

Engineering Contradiction:
Improveboot-up speedVSAvoidprocessor architecture
Core Design Contradiction:
SpeedVSDevice complexity

Solution Approach 1:

The patent merges the capabilities of two processors to achieve faster boot-up speed. The first processor handles CPU initialization and DDR calibration, while the second processor simultaneously handles image file copying and decompression. This merging of functions across multiple processors creates a parallel processing architecture that accelerates the overall boot-up process.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The DDR memory serves as an intermediary between the two processors, allowing the second processor to prepare image files in the DDR memory while the first processor performs its initialization tasks. This intermediary memory space enables efficient data transfer and coordination between processors without creating direct communication bottlenecks.

Inventive Principle:
Principle #24Intermediary (Mediator)

3Loss of time

If image file copying and decompression are performed by the first processor, then the processor architecture is simple, but the startup time increases

Engineering Contradiction:
Improvetime for image file processingVSAvoidprocessor task distribution
Core Design Contradiction:
Loss of timeVSDevice complexity

Solution Approach 1:

The patent extracts the image file copying and decompression tasks from the first processor and assigns them to the second processor. This extraction removes the time-consuming file operations from the critical boot-up path of the first processor, allowing it to focus solely on initialization and calibration tasks, thereby reducing overall startup time.

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The patent introduces a new dimension of parallel processing by adding a second processor that operates independently from the first processor during boot-up. This dimensional change from single-processor sequential execution to multi-processor parallel execution transforms the time required for image file processing from a sequential bottleneck into a concurrent operation that occurs alongside first processor initialization.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Data Source

PatentUS9940176B2Dual-processor electronic device and method for quick boot up
Publication Date: 2018.04.10 NANNING FUGUI PRECISION IND CO LTD
  • US9940176B2 patent drawing
  • US9940176B2 patent drawing
  • US9940176B2 patent drawing

AI summary

A dual-processor electronic device is provided. The dual-processor electronic device includes a first processor, a second processor and a dynamic random access memory. The first processor sends a wake-up command to the second processor to wake up the second processor after performing local initialization. The second processor wakes up, then performs local initialization, copies and decompresses the image file to the dynamic random access memory and sends a ready message to the first processor after the image file is decompressed. The first processor delays startup, and starts the startup process according to the decompressed image file when the ready message is received and the delay-start time is expired. The present disclosure also provides a method for booting up dual-processor electronic device quickly.