Dual-Processor Display System for Power Management

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Solution Overview

Problem

Existing display devices for electronic apparatuses face increased processing load and power consumption due to the need for a single CPU to constantly monitor and switch between display modes, and complex display control requirements for sub-pixels in transmissive and reflective modes, leading to inefficient power management.

Innovation Solution

A dual-display block system where a high-performance processor handles high-definition color displays and a low-performance processor handles simple monochrome displays, with collaborative communication to manage power consumption and display modes, allowing for efficient switching between different display formats.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If a single CPU is used to monitor and switch between display modes, then display functionality is maintained, but processing load and power consumption increase

Engineering Contradiction:
Improvedisplay mode switchingVSAvoidCPU power consumption
Core Design Contradiction:
Adaptability or versatilityVSUse of energy by moving object

Solution Approach 1:

The patent divides the display system into two independent display blocks (first display block with high-performance processor and second display block with low-performance processor). Each block can operate independently in different display modes, eliminating the need for a single CPU to constantly monitor and switch modes. The segmentation allows the low-performance processor to handle simple monochrome displays while the high-performance processor handles complex color displays only when needed.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent implements multi-functionality by enabling the display device to operate in multiple display modes (color display mode, monochrome display mode, and off mode) using different processor configurations. The system can universally handle both simple and complex display requirements by selecting the appropriate processor and display mode, reducing power consumption for simple tasks while maintaining full color display capability when needed.

Inventive Principle:
Principle #6Universality (Multi-functionality)

2Adaptability or versatility

If sub-pixels are controlled individually for transmissive and reflective display modes, then display flexibility is improved, but display control complexity and CPU processing load increase

Engineering Contradiction:
Improvedisplay mode flexibilityVSAvoiddisplay control complexity
Core Design Contradiction:
Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The patent segments the display into two separate display blocks with independent processors, eliminating the need for complex sub-pixel level control. Each display block operates independently with its own processor, simplifying the control architecture. The first display block handles color display while the second handles monochrome display, avoiding the complexity of individually controlling sub-pixels for different display modes.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent uses a simplified approach by creating separate display blocks rather than copying complex control logic for sub-pixels. The low-performance processor in the second display block uses a simplified display control architecture that replicates basic display functionality without the complexity of individual sub-pixel control required in transmissive/reflective modes.

Inventive Principle:
Principle #26Copying

Data Source

PatentEP3396662B1Display device and method for controlling same
Publication Date: 2022.04.06 CASIO COMPUTER CO LTD
  • EP3396662B1 patent drawingFigure 1
  • EP3396662B1 patent drawingFigure 2
  • EP3396662B1 patent drawingFigure 3(a)~3(d)

AI summary

A display device and a method for controlling same are provided which are capable of suppressing power consumption of an electronic apparatus while supplying a user with various types of information in various display formats. The display device 10 has a first display block BL1 including a processor 100 with relatively high processing power and a display section 400 with high display performance and a second display block BL2 including a processor 200 with relatively low processing power and a display section 500 with low display performance. The processors 100 and 200 mutually collaborate and are controlled to properly use the first display block BL and the second display block BL2 in accordance with an operation mode.