Dual-Processor Digital TV Architecture for Stream Processing

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Solution Overview

Problem

Conventional digital televisions (DTVs) rely on a single Complex Instruction Set Computer (CISC) processor, leading to increased hardware and software costs, decreased processing efficiency, and timeliness due to complex management and processing mechanisms.

Innovation Solution

A dual-processor apparatus and method for DTVs, utilizing a low-capacity first processor for task assignment and a high-capacity second processor for complex computations, with a communication unit to exchange commands and process DTV streams, allowing for efficient processing of DTV data streams using different processors like an 8-bit 8051 microprocessor combined with a 32-bit MIPS/ARM processor.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If a single high-capacity CISC processor is used to process DTV streams, then processing capability is sufficient, but hardware complexity and software costs increase

Engineering Contradiction:
ImproveDTV stream processing capabilityVSAvoidprocessor architecture complexity
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The patent divides the processing system into two distinct processors: a first processor (e.g., 8-bit 8051 microprocessor) for control functions and a second processor (e.g., 32-bit MIPS/ARM processor) for complex computations. This segmentation allows each processor to be optimized for its specific function, reducing overall system complexity while maintaining processing capability.

Inventive Principle:
Principle #1Segmentation

2Adaptability or versatility

If a complex operating system is implemented to manage software and hardware resources, then resource management capability is improved, but processing efficiency and timeliness decrease

Engineering Contradiction:
Improveresource management capabilityVSAvoidprocessing efficiency
Core Design Contradiction:
Adaptability or versatilityVSProductivity

Solution Approach 1:

The patent segments the operating system into two parts: a real-time operating system on the first processor for timely control operations, and a file system operating system on the second processor for resource management. This segmentation allows the control functions to operate in real-time without being burdened by complex resource management tasks.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent introduces a communication unit as an intermediary between the two processors. This communication unit handles the interaction and data exchange between the first and second processors, allowing them to work together efficiently while maintaining their respective operating systems without direct interference.

Inventive Principle:
Principle #24Intermediary (Mediator)

3Device complexity

If a single processor handles all DTV processing tasks, then system structure is simple, but processing efficiency and timeliness deteriorate

Engineering Contradiction:
Improvesystem structureVSAvoidprocessing efficiency
Core Design Contradiction:
Device complexityVSProductivity

Solution Approach 1:

The patent segments processing tasks into two categories: control functions (demultiplexing, command generation) handled by the first processor, and complex computations (video decoding, audio processing) handled by the second processor. This segmentation enables parallel processing, significantly improving overall processing efficiency.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent transitions from a single-dimensional processing model (one processor handling all tasks sequentially) to a two-dimensional processing model (two processors working in parallel on different task types). This dimensional change enables simultaneous execution of control and computation tasks.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

4Productivity

If a high-capacity processor is used for all tasks, then processing capability is sufficient, but additional development costs are incurred

Engineering Contradiction:
Improveprocessing capabilityVSAvoiddevelopment cost
Core Design Contradiction:
ProductivityVSEase of manufacture

Solution Approach 1:

The patent replaces the need for an expensive high-capacity processor with a combination of a low-cost first processor and a more economical second processor. The first processor (e.g., 8051 microprocessor) is a inexpensive, widely available component that handles control functions, eliminating the need to develop or license expensive proprietary processor architectures.

Inventive Principle:
Principle #27Cheap short-living objects (Disposable)

Solution Approach 2:

The patent changes the processor configuration parameters from a single high-capacity processor to a dual-processor system with different capability levels. This parameter change allows the system to achieve the required processing capability through coordinated operation of two processors rather than relying on a single expensive processor.

Inventive Principle:
Principle #35Parameter changes

Data Source

PatentUS8233531B2Processing apparatus and processing method for a digital television
Publication Date: 2012.07.31 XUESHAN TECH INC
  • US8233531B2 patent drawing
  • US8233531B2 patent drawing
  • US8233531B2 patent drawing

AI summary

A processing method and a processing apparatus for a digital television are provided. A processing apparatus for a digital television (DTV) to process a DTV stream, comprising: a demultiplexing unit for retrieving a service information from the DTV stream; a memory coupled to the demultiplexing unit for storing the service information; a first processor coupled to the memory for assigning a task by sending a command according to the service information; a second processor coupled to the memory for processing the task according the command; a communication unit coupled to the first processor and the second processor, for receiving the command from the first processor and sending the command to the second processor; and at least one function module coupled to the first processor and the second processor, respectively, controlled by the first processor or the second processor, to process the service information.