Dual-Processor Architecture for IP Communication Power Reduction
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Solution Overview
Problem
Portable IP communications devices, such as cellular telephones with Internet capabilities, face significant power consumption issues due to high-frequency application processors that must remain active for various functions, leading to shorter battery life, even during periods of inactivity or low data transmission.
Innovation Solution
Implementing a dual-application processor architecture with a high-power consumption main processor for user interface and control tasks and a low-power consumption processor for IP and voice signal processing, allowing the high-power processor to enter sleep mode and reducing overall power usage by allocating processor-intensive tasks to the lower frequency processor.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If a single high-frequency application processor is used to handle all functions including IP processing and user interface, then processing capability and functionality are improved, but power consumption increases and battery life decreases
Solution Approach 1:
The patent divides the application processor into two separate processors: a high-power consumption application processor for user interface and signaling tasks, and a low-power consumption application processor for IP processing and data communication. This segmentation allows each processor to be optimized for its specific function, enabling the high-power processor to enter sleep mode during idle periods while the low-power processor maintains network connectivity and data processing.
2Reliability
If the high-power application processor remains active to handle Wi-Fi and IP stack operations, then network protocol handling capability is improved, but battery drain increases
Solution Approach 1:
The low-power consumption application processor acts as an intermediary between the Wi-Fi chipset and the high-power application processor. It handles TCP/IP stack operations, data buffering, and protocol processing, allowing the high-power processor to remain in sleep mode during data transmission periods while still maintaining reliable network connectivity through the intermediary processor.
3Speed
If the application processor operates at high frequency for peak performance, then processing speed is improved, but power consumption increases
Solution Approach 1:
The patent applies local quality by assigning different processing capabilities to different processors based on their power consumption characteristics. The high-power processor operates at high frequency for user interface and signaling tasks requiring fast response, while the low-power processor handles IP processing at lower frequencies. This allows the system to use high processing speed only where necessary while conserving energy in other functions.
Data Source
AI summary
An apparatus for reducing power consumption in an IP (Internet Protocol) communications device. The apparatus may include a high-power consumption main application processor and a low-power consumption application processor to share processor functions. The high-power consumption application processor may carry out functions related to the user interface of the device, signaling and control path. The low-power consumption application processor may implement IP processing, voice signal processing and video signal processing.