Dual Processor Power Management via Segmentation and Dynamics
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Solution Overview
Problem
Electronic apparatus powered by batteries face high power dissipation issues, leading to shorter operational times, as existing technologies do not effectively manage power consumption between processors.
Innovation Solution
A dual-processor electronic apparatus operation method where a first processor with higher power dissipation is activated only when a predetermined event occurs, allowing a second processor with lower power dissipation to perform initial operations and store event information, thereby reducing overall power consumption.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If the first processor with higher power dissipation is activated to perform all operations, then the processing capability is improved, but the power consumption increases and operational time decreases
Solution Approach 1:
The patent divides the processing tasks between two processors: a first processor for high-power intensive operations and a second processor for low-power routine operations. This segmentation allows the system to distribute workload according to power consumption characteristics, extending battery life while maintaining processing capability when needed.
Solution Approach 2:
The system dynamically switches between processors based on operational requirements. The controller determines whether to activate the first or second processor based on the specific task at hand, allowing the system to adapt its power consumption profile to match the actual processing needs, thereby extending operational time.
2Loss of energy
If the first processor is deactivated to reduce power dissipation, then the power consumption is reduced, but the processing capability is compromised
Solution Approach 1:
The second processor acts as an intermediary that handles routine operations and monitors system state. When the first processor is deactivated, the second processor maintains basic functionality and can trigger reactivation of the first processor when intensive processing is required, thus preserving processing capability while minimizing power dissipation during low-demand periods.
Solution Approach 2:
The system employs periodic activation of the first processor based on operational needs. The controller periodically assesses whether intensive processing is required and activates the first processor only during these periods, allowing the system to reduce average power dissipation while maintaining the ability to perform high-capacity processing when needed.
3Productivity
If dual processors operate simultaneously, then the processing capability is improved, but the power dissipation increases significantly
Solution Approach 1:
The patent segments the operational workload between two processors with different power consumption characteristics. The first processor handles computationally intensive tasks while the second processor handles routine monitoring and control functions. This segmentation ensures that both processors are not simultaneously active for all operations, reducing overall power dissipation while maintaining processing capability for intensive tasks.
Solution Approach 2:
The system assigns different functional qualities to each processor: the first processor is optimized for high-performance computing while the second processor is optimized for low-power operation. This local quality differentiation allows the system to use the appropriate processor for each task, avoiding the need for both processors to operate at full capacity simultaneously, thus reducing power dissipation.
Data Source
AI summary
The present disclosure discloses a dual-processor electronic apparatus operation method used in a dual-processor electronic apparatus that includes steps outlined below. A first processor is activated in an initialization procedure. A second processor is activated by the first processor to enter an operation mode. The first processor is deactivated in the operation mode, and the second processor executes a predetermined procedure. Whether a predetermined event occurs during the execution of the predetermined procedure is determined by the second processor such that event information is stored when the predetermined event occurs and the first processor is activated. The event information is accessed and processed by the first processor.