Dual-Processor Control Logic for Low-Cost Redundant Verification

The patent segments the processing system into two distinct processor configurations: a first processor that executes non-redundant processing for normal operations, and a second processor that executes redundant processing for verification. This segmentation allows the system to achieve reliability through redundant processing only when necessary, rather than maintaining constant redundancy, thereby reducing overall system cost while preserving reliability benefits.

The patent implements dynamic switching between non-redundant and redundant processing modes based on system state and reliability requirements. The control unit determines when to activate the second processor for redundant verification and when to rely solely on the first processor, creating a flexible system that adapts reliability levels to actual needs rather than maintaining fixed high-cost redundancy.

The patent implements periodic redundant processing rather than continuous redundancy. The second processor executes redundant processing at specific intervals or under specific conditions determined by the control unit, allowing the system to maintain reliability through periodic verification while avoiding the continuous performance overhead that would result from constant redundant execution.

The patent applies partial redundant action by having the second processor execute redundant processing only for critical determination results rather than all processing operations. This selective approach provides sufficient reliability for safety-critical functions while minimizing the processing speed penalty that would result from comprehensive continuous redundancy.