Dual-Processor Scan Tool Bus Arbitration and Interrupt Management
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Current automotive scan tools with single processors face inefficiencies due to frequent interrupts and processing delays when handling byte-by-byte data communication, leading to reduced processor bandwidth and increased processing time.
Innovation Solution
A dual-processor system where a slave processor handles bus arbitration, filters out unnecessary data, and manages data transmission, allowing the master processor to focus on essential diagnostic tasks, thereby reducing interrupts and improving processing efficiency.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If a single processor handles all bus traffic byte-by-byte with frequent interrupts, then the processor can manage all communication protocols and diagnostic functions, but the processor bandwidth is reduced and processing time increases
Solution Approach 1:
The patent divides the single processor into two separate processors: a master processor that handles high-level diagnostic functions and protocol management, and a slave processor that handles byte-by-byte communication and interrupt processing. This segmentation allows the master processor to focus on complex tasks while the slave processor manages routine communication, thereby improving overall processor bandwidth without sacrificing protocol handling capability.
Solution Approach 2:
The slave processor acts as an intermediary between the communication bus and the master processor. It receives all bus traffic, filters out unwanted data using configurable software filters, and only passes relevant messages to the master processor. This intermediary role reduces the interrupt burden on the master processor and improves processing efficiency.
2Loss of information
If a single processor processes all incoming data packets including unwanted traffic, then comprehensive data analysis is possible, but processing time increases due to handling undesired data
Solution Approach 1:
The slave processor extracts only the relevant data packets from the bus traffic using configurable software filters. It removes unwanted data before passing it to the master processor, ensuring that the master processor only analyzes meaningful information. This extraction process maintains data analysis completeness while significantly reducing processing time.
Solution Approach 2:
The slave processor performs partial processing of all incoming data by filtering and pre-processing packets before they reach the master processor. This partial action at the slave level reduces the overall processing burden on the system while ensuring that all necessary data is eventually analyzed by the master processor.
3Reliability
If the processor handles all bus traffic interrupts, then no data is missed, but processor capability is consumed for undesired data processing
Solution Approach 1:
The patent segments the interrupt handling responsibilities between two processors. The slave processor handles all bus traffic interrupts and filters messages, while the master processor only handles interrupts for relevant data. This segmentation maintains reliable data reception (no messages are missed) while reducing the processor capability consumed for undesired data processing.
Solution Approach 2:
The slave processor serves as an intermediary that intercepts all bus traffic interrupts, filters out unwanted messages using configurable software filters, and only passes relevant data to the master processor. This intermediary function ensures no data is missed while significantly reducing the interrupt burden on the master processor.
Data Source
AI summary
A method of processing J1850 requests using a scan tool having multiple processor systems is provided. The scan tool includes a first processor that processes data according to scan tool functions to assist with diagnosing and repairing a vehicle. A second processor receives data transmitted to the first processor and stores the data in a buffer. The second processor determines whether the data is complete to enable the first processor to make a determination regarding the data.