Dual Processor Time Display Power Management

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Solution Overview

Problem

Conventional electronic devices with multiple display units face challenges in efficiently managing power consumption and display operations, particularly in maintaining accurate time displays across different modes without significant power drain.

Innovation Solution

The implementation of a smart watch design featuring two processors and display units, where the main CPU controls the primary display unit and the sub CPU manages a secondary display unit with low power consumption, allowing for flexible power mode switching and efficient time display management across normal, low power, and pause modes.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Device complexity

If a single processor controls all display units, then device complexity is reduced, but power consumption management and display operation efficiency deteriorate

Engineering Contradiction:
Improveprocessor configurationVSAvoidpower consumption
Core Design Contradiction:
Device complexityVSUse of energy by moving object

Solution Approach 1:

The system divides the processor functionality into two separate processors: a main CPU for high-performance operations and a sub CPU for power-efficient time display operations. This segmentation allows each processor to be optimized for its specific function, reducing overall power consumption while maintaining device capabilities.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The system dynamically switches between the main CPU and sub CPU based on operational requirements. During time display operations, the sub CPU takes control to reduce power consumption, while the main CPU handles other tasks. This dynamic allocation optimizes power usage without sacrificing performance when needed.

Inventive Principle:
Principle #15Dynamics

2Speed

If the main CPU continuously controls the display unit, then display operation responsiveness is improved, but power consumption increases

Engineering Contradiction:
Improvedisplay operation responsivenessVSAvoidpower consumption
Core Design Contradiction:
SpeedVSUse of energy by moving object

Solution Approach 1:

The sub CPU periodically updates the time display at appropriate intervals rather than requiring continuous main CPU intervention. This periodic action maintains accurate time display functionality while allowing the main CPU to enter low-power states between updates, significantly reducing overall power consumption.

Inventive Principle:
Principle #19Periodic action

Solution Approach 2:

The sub CPU independently manages time display operations without requiring continuous main CPU control. It autonomously handles timekeeping and display updates, freeing the main CPU to focus on other tasks and reducing the power consumption associated with constant processor engagement.

Inventive Principle:
Principle #25Self-service

3Adaptability or versatility

If multiple display units are used, then display flexibility and information presentation are improved, but power consumption and device complexity increase

Engineering Contradiction:
Improvedisplay flexibilityVSAvoidpower consumption
Core Design Contradiction:
Adaptability or versatilityVSUse of energy by moving object

Solution Approach 1:

The system assigns different display units to different processors based on their functional requirements. The main CPU controls the primary display unit for general information, while the sub CPU controls a secondary display unit specifically for time display. This segmentation allows each display unit to be optimized for its purpose while managing power consumption efficiently.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The sub CPU is designed to handle multiple functions related to time display across different display units, making it a multi-functional component. This universality allows the system to present time information flexibly on various display units while maintaining power efficiency through a single dedicated processor.

Inventive Principle:
Principle #6Universality (Multi-functionality)

4Use of energy by moving object

If power mode switching is implemented, then power consumption optimization is improved, but device complexity and control overhead increase

Engineering Contradiction:
Improvepower consumption optimizationVSAvoidcontrol mechanism
Core Design Contradiction:
Use of energy by moving objectVSDevice complexity

Solution Approach 1:

The system implements dynamic power mode switching between main CPU and sub CPU based on operational context. The control mechanism automatically determines when to switch processors based on simple criteria (time display requirements), providing power optimization without requiring complex user intervention or sophisticated control algorithms.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The system automatically manages power mode transitions without requiring user input or complex external control. The sub CPU autonomously activates for time display tasks and deactivates when not needed, and the main CPU similarly manages its own power states, reducing the complexity of overall power management.

Inventive Principle:
Principle #25Self-service

Data Source

PatentUS11774916B2Electronic device capable of appropriately using various time displays
Publication Date: 2023.10.03 CASIO COMPUTER CO LTD
  • US11774916B2 patent drawing
  • US11774916B2 patent drawing
  • US11774916B2 patent drawing

AI summary

An electronic device includes first and second processors, and first and second display units. While the first and second processors cooperate with each other and perform a display operation including a time display, the first processor can be set to a normal mode, a low power mode in which a power consumption is lower than a power consumption in the normal mode, or a pause mode in which a power consumption is lower than the power consumption in the low power mode, and the first processor is stopped. In the normal or low power modes, the first processor controls such that the first display unit displays a time, and the second processor controls such that the second display unit does not display a time. In the pause mode, the first display unit is turned off, and the second processor controls such that the second display unit displays a time.